Searched refs:AGILEX5_UART_1_PCLK (Results 1 – 2 of 2) sorted by relevance
87 #define AGILEX5_UART_1_PCLK 71 macro
381 { AGILEX5_UART_1_PCLK, "uart_1_pclk", l4_sp_clk_parent, 1, 0, 0x7C, 21,