Searched refs:AGILEX5_UART_0_PCLK (Results 1 – 2 of 2) sorted by relevance
86 #define AGILEX5_UART_0_PCLK 70 macro
379 { AGILEX5_UART_0_PCLK, "uart_0_pclk", l4_sp_clk_parent, 1, 0, 0x7C, 20,