Searched refs:ADSP_CFGREG_SW_RSTN (Results 1 – 2 of 2) sorted by relevance
30 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, in mt8186_sof_hifixdsp_boot_sequence()38 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, in mt8186_sof_hifixdsp_boot_sequence()54 snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, in mt8186_sof_hifixdsp_shutdown()
23 #define ADSP_CFGREG_SW_RSTN 0x0000 macro