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Searched refs:NLP2020_CL45_PORT1_ADDR2 (Results 1 – 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_phy_hw.h121 #define NLP2020_CL45_PORT1_ADDR2 0x14 macro
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c7419 } else if (nxge_is_phy_present(nxgep, NLP2020_CL45_PORT1_ADDR2, in nxge_hswap_phy_present()
7421 nxgep->xcvr_addr = NLP2020_CL45_PORT1_ADDR2; in nxge_hswap_phy_present()
8068 case NLP2020_CL45_PORT1_ADDR2: in nxge_scan_ports_phy()
8101 case NLP2020_CL45_PORT1_ADDR2: in nxge_scan_ports_phy()