Searched refs:EMLXS_MSI0_MASK1 (Results 1 – 2 of 2) sorted by relevance
611 #define EMLXS_MSI0_MASK1 (HC_R0INT_ENA|HC_R1INT_ENA|HC_R2INT_ENA| \ macro
47 {EMLXS_MSI0_MASK1, EMLXS_MSI0_MASK2, EMLXS_MSI0_MASK4,