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Searched refs:voffset (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DBUFInstructions.td1357 (vt (st v4i32:$rsrc, 0, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1359 …(!cast<MUBUF_Pseudo>(opcode # _OFFEN) VGPR_32:$voffset, SReg_128:$rsrc, SCSrc_b32:$soffset, timm:$…
1371 (vt (st v4i32:$rsrc, i32:$vindex, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1374 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1),
1465 (st vt:$vdata, v4i32:$rsrc, 0, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1467 …(!cast<MUBUF_Pseudo>(opcode # _OFFEN_exact) getVregSrcForVT<vt>.ret:$vdata, VGPR_32:$voffset, SReg…
1479 (st vt:$vdata, v4i32:$rsrc, i32:$vindex, i32:$voffset, (BUFSOffset i32:$soffset), timm:$offset,
1483 (REG_SEQUENCE VReg_64, VGPR_32:$vindex, sub0, VGPR_32:$voffset, sub1),
1694 (vt (Op vt:$vdata_in, v4i32:$rsrc, 0, i32:$voffset,
1697 getVregSrcForVT<vt>.ret:$vdata_in, VGPR_32:$voffset, SReg_128:$rsrc,
[all …]
H A DSIInstrInfo.td101 SDTCisVT<3, i32>, // voffset(VGPR)
119 SDTCisVT<3, i32>, // voffset(VGPR)
137 SDTCisVT<3, i32>, // voffset(VGPR)
175 SDTCisVT<3, i32>, // voffset(VGPR)
201 SDTCisVT<4, i32>, // voffset(VGPR)
209 (ops node:$vdata_in, node:$rsrc, node:$vindex, node:$voffset, node:$soffset,
212 node:$voffset, node:$soffset, node:$offset, node:$cachepolicy,
240 SDTCisVT<5, i32>, // voffset(VGPR)
249 (ops node:$src, node:$cmp, node:$rsrc, node:$vindex, node:$voffset,
252 node:$voffset, node:$soffset, node:$offset, node:$cachepolicy,
[all …]
H A DFLATInstructions.td1051 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), vt:$in)),
1052 (inst $saddr, $voffset, $offset, 0, $in)
1061 (vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset))),
1062 (inst $saddr, $voffset, $offset, 0)
1067 (node vt:$data, (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset)),
1068 (inst $voffset, getVregSrcForVT<vt>.ret:$data, $saddr, $offset)
1073 …(vt (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), data_vt:$data)),
1074 (inst $voffset, getVregSrcForVT<data_vt>.ret:$data, $saddr, $offset)
1079 (node (GlobalSAddr (i64 SReg_64:$saddr), (i32 VGPR_32:$voffset), i32:$offset), vt:$data),
1080 (inst $voffset, getVregSrcForVT<vt>.ret:$data, $saddr, $offset)
H A DSIInstructions.td3734 let InOperandList = (ins type1:$rsrc, type2:$vindex, type2:$voffset,
3743 let InOperandList = (ins type1:$rsrc, type2:$vindex, type2:$voffset,
3768 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset,
3777 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset,
3869 let InOperandList = (ins type0:$vdata, type1:$rsrc, type2:$vindex, type2:$voffset,
3897 type2:$voffset, type2:$soffset, untyped_imm_0:$offset,
/freebsd/sys/vm/
H A Dvnode_pager.c633 daddr_t voffset; in vnode_pager_addr() local
640 voffset = address % bsize; in vnode_pager_addr()
645 *rtaddress += voffset / DEV_BSIZE; in vnode_pager_addr()
649 *run -= voffset / PAGE_SIZE; in vnode_pager_addr()
/freebsd/contrib/llvm-project/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/
H A DAppleObjCTrampolineHandler.cpp265 uint32_t voffset = desc_extractor.GetU32(&offset); in SetUpRegion()
267 lldb::addr_t code_addr = desc_ptr + start_offset + voffset; in SetUpRegion()
266 uint32_t voffset = desc_extractor.GetU32(&offset); SetUpRegion() local
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td1612 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
1631 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
1654 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)
1674 llvm_i32_ty, // voffset(VGPR, included in bounds checking and swizzling)