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Searched refs:m_ICst (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUGlobalISelUtils.cpp43 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) in getBaseWithConstantOffset()
47 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) in getBaseWithConstantOffset()
52 if (KnownBits && mi_match(Reg, MRI, m_GOr(m_Reg(Base), m_ICst(Offset))) && in getBaseWithConstantOffset()
60 m_GPtrAdd(m_MInstr(Base), m_ICst(Offset)))) { in getBaseWithConstantOffset()
H A DAMDGPUPreLegalizerCombiner.cpp152 m_GSMin(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16()
154 m_GSMax(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16()
160 m_GSMax(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16()
162 m_GSMin(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16()
H A DAMDGPUPostLegalizerCombiner.cpp326 IsShr = mi_match(SrcReg, MRI, m_GLShr(m_Reg(Src0), m_ICst(ShiftAmt))); in matchCvtF32UByteN()
327 if (IsShr || mi_match(SrcReg, MRI, m_GShl(m_Reg(Src0), m_ICst(ShiftAmt)))) { in matchCvtF32UByteN()
H A DAMDGPUInstructionSelector.cpp4615 if (mi_match(Root.getReg(), *MRI, m_ICst(Offset)) && in selectMUBUFScratchOffen()
4850 m_any_of(m_ICst(Offset), m_Copy(m_ICst(Offset)))))) { in selectMUBUFScratchOffset()
4869 if (!mi_match(Root.getReg(), *MRI, m_ICst(Offset)) || in selectMUBUFScratchOffset()
4906 } else if (mi_match(Root.getReg(), *MRI, m_ICst(ConstAddr))) { in selectDS1Addr1OffsetImpl()
4972 } else if (mi_match(Root.getReg(), *MRI, m_ICst(ConstAddr))) { in selectDSReadWrite2Impl()
H A DVOP3Instructions.td516 if (!mi_match(MI.getOperand(2).getReg(), MRI, m_ICst(Imm)) &&
517 !mi_match(MI.getOperand(2).getReg(), MRI, m_Copy(m_ICst(Imm))))
H A DAMDGPURegisterBankInfo.cpp1784 if (mi_match(Reg, MRI, m_ICst(Const))) in getBaseWithConstantOffset()
1788 if (mi_match(Reg, MRI, m_GAdd(m_Reg(Base), m_ICst(Const)))) in getBaseWithConstantOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp194 if (mi_match(ShAmtReg, MRI, m_GAnd(m_Reg(AndSrcReg), m_ICst(AndMask)))) { in selectShiftMask()
209 if (mi_match(ShAmtReg, MRI, m_GAdd(m_Reg(Reg), m_ICst(Imm)))) { in selectShiftMask()
214 } else if (mi_match(ShAmtReg, MRI, m_GSub(m_ICst(Imm), m_Reg(Reg)))) { in selectShiftMask()
259 m_GAnd(m_GShl(m_Reg(RegY), m_ICst(C2)), m_ICst(Mask)))) in selectSHXADDOp()
263 m_GAnd(m_GLShr(m_Reg(RegY), m_ICst(C2)), m_ICst(Mask)))) in selectSHXADDOp()
305 m_GShl(m_OneNonDBGUse(m_GAnd(m_Reg(RegY), m_ICst(Mask))), in selectSHXADDOp()
306 m_ICst(C2)))) in selectSHXADDOp()
310 m_GLShr(m_OneNonDBGUse(m_GAnd(m_Reg(RegY), m_ICst(Mask))), in selectSHXADDOp()
311 m_ICst(C2)))) in selectSHXADDOp()
360 m_OneNonDBGUse(m_GAnd(m_OneNonDBGUse(m_GShl(m_Reg(RegX), m_ICst(C2))), in selectSHXADD_UWOp()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLoadStoreOpt.cpp208 m_GPtrAdd(m_Reg(BaseReg), m_ICst(Offset)))) { in instMayAlias()
666 m_any_of(m_GLShr(m_Reg(FoundSrcVal), m_ICst(ShiftAmt)), in getTruncStoreByteOffset()
667 m_GAShr(m_Reg(FoundSrcVal), m_ICst(ShiftAmt))))) { in getTruncStoreByteOffset()
747 m_GPtrAdd(m_Reg(BaseReg), m_ICst(LastOffset)))) { in mergeTruncStore()
792 m_GPtrAdd(m_Reg(NewBaseReg), m_ICst(MemOffset)))) { in mergeTruncStore()
H A DCombinerHelper.cpp2484 if (mi_match(LHS, MRI, m_GIntToPtr(m_ICst(Cst)))) { in matchCombineConstPtrAddToI2P()
3055 m_GInsertVecElt(m_MInstr(TmpInst), m_Reg(TmpReg), m_ICst(IntImm)))) { in matchCombineInsertVecElts()
3268 m_GAnd(m_GAnd(m_Reg(R), m_ICst(C1)), m_ICst(C2)))) in matchOverlappingAnd()
3462 if (!mi_match(CstReg, MRI, m_ICst(Cst))) in matchNotCmp()
3755 m_OneNonDBGUse(m_GShl(m_Reg(MaybeLoad), m_ICst(Shift))))) { in matchLoadAndBytePosition()
3838 m_GPtrAdd(m_Reg(LoadPtr), m_ICst(Idx)))) { in findLoadOffsetsForLoadOrCombine()
4478 m_GAnd(m_GOr(m_Reg(Src), m_ICst(OrMaskBits)), in matchAndOrDisjointMask()
4479 m_all_of(m_ICst(AndMaskBits), m_Reg(AndMaskReg))))) in matchAndOrDisjointMask()
4512 m_OneNonDBGUse(m_any_of(m_GAShr(m_Reg(ShiftSrc), m_ICst(ShiftImm)), in matchBitfieldExtractFromSExtInReg()
4513 m_GLShr(m_Reg(ShiftSrc), m_ICst(ShiftImm)))))) in matchBitfieldExtractFromSExtInReg()
[all …]
H A DLegalizerHelper.cpp4147 if (mi_match(IdxReg, *B.getMRI(), m_ICst(IdxVal))) { in clampVectorIndex()
7541 if (mi_match(Idx, MRI, m_ICst(IdxVal)) && IdxVal <= NumElts) { in lowerExtractInsertVectorElt()
7574 if (mi_match(Idx, MRI, m_ICst(IdxVal))) { in lowerExtractInsertVectorElt()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMIPatternMatch.h93 inline ConstantMatch<APInt> m_ICst(APInt &Cst) { in m_ICst() function
96 inline ConstantMatch<int64_t> m_ICst(int64_t &Cst) { in m_ICst() function
190 return mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal; in match()
222 if (mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal) in match()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp730 m_OneNonDBGUse(m_GPtrAdd(m_Reg(PtrBaseReg), m_ICst(Offset))))) { in optimizeConsecutiveMemOpAddressing()
H A DAArch64LegalizerInfo.cpp1721 if (mi_match(Root, MRI, m_GPtrAdd(m_Reg(NewBase), m_ICst(NewOffset))) && in matchLDPSTPAddrMode()
H A DAArch64InstructionSelector.cpp2410 m_GOr(m_OneNonDBGUse(m_GShl(m_Reg(ShiftSrc), m_ICst(ShiftImm))), in earlySelect()
2411 m_OneNonDBGUse(m_GAnd(m_Reg(MaskSrc), m_ICst(MaskImm)))))) in earlySelect()
5190 if (!Extract || !mi_match(Extract->getOperand(2).getReg(), MRI, m_ICst(Lane))) in selectUSMovFromExtend()