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Searched refs:isVirtual (Results 1 – 25 of 305) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp127 if (DstReg.isVirtual() && SrcReg.isVirtual()) { in runOnMachineFunction()
175 if (DstReg.isVirtual() && SrcReg.isVirtual()) { in runOnMachineFunction()
196 if (DstReg.isVirtual() && SrcReg.isVirtual()) { in runOnMachineFunction()
227 if (Reg0.isVirtual()) { in runOnMachineFunction()
H A DHexagonGenPredicate.cpp113 if (!R.isVirtual()) in INITIALIZE_PASS_DEPENDENCY()
191 if (RD.Reg.isVirtual()) in collectPredicateGPR()
225 assert(Reg.Reg.isVirtual()); in getPredRegFor()
451 if (!DR.Reg.isVirtual()) in eliminatePredCopies()
453 if (!SR.Reg.isVirtual()) in eliminatePredCopies()
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DInheritViz.cpp99 if (!Base.isVirtual()) in WriteNode()
103 WriteNode(Base.getType(), Base.isVirtual()); in WriteNode()
109 WriteNodeReference(Base.getType(), Base.isVirtual()); in WriteNode()
112 if (Base.isVirtual()) { in WriteNode()
H A DCXXInheritance.cpp193 if (BaseSpec.isVirtual()) { in lookupInBases()
210 if (BaseSpec.isVirtual()) in lookupInBases()
334 if (!PE.Base->isVirtual()) in lookupInBases()
379 return Specifier->isVirtual() && in FindVirtualBaseClass()
475 if (Overriders.empty() && !Base.isVirtual()) { in Collect()
489 if (Base.isVirtual()) { in Collect()
519 if (!M->isVirtual()) in Collect()
H A DVTTBuilder.cpp63 if (I.isVirtual()) in LayoutSecondaryVTTs()
108 if (I.isVirtual()) { in LayoutSecondaryVirtualPointers()
160 if (I.isVirtual()) { in LayoutVirtualVTTs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNPreRAOptimizations.cpp122 if (!SrcReg.isVirtual()) in processReg()
144 if (DefSrcMO.isReg() && DefSrcMO.getReg().isVirtual()) { in processReg()
273 if (Dst.isVirtual() && in run()
278 if (Src.isVirtual() && in run()
283 if (!Dst.isVirtual() || !Src.isVirtual()) in run()
H A DSIShrinkInstructions.cpp106 if (Reg.isVirtual()) { in foldImmediates()
157 assert(!Reg.isVirtual() && "Prior checks should ensure we only shrink " in shouldShrinkTrue16()
578 if (Dest->getReg().isVirtual() && SrcReg->isReg()) { in shrinkScalarLogicOp()
617 } else if (MO.getReg() == Reg && Reg.isVirtual()) { in instAccessReg()
704 if (Size == 2 && X.isVirtual()) in matchSwap()
808 if (T.isVirtual() && MRI->use_nodbg_empty(T)) { in matchSwap()
904 if (Dest->getReg().isVirtual() && Src0->isReg()) { in run()
1006 if (DstReg.isVirtual()) { in run()
1032 if (SReg.isVirtual()) { in run()
1048 if (SDst->getReg().isVirtual()) in run()
[all …]
H A DSIOptimizeExecMaskingPreRA.cpp104 if (Reg.isVirtual()) in isDefBetween()
228 if (CCReg.isVirtual()) { in optimizeVcndVcmpPair()
240 LiveInterval *CmpLI = CmpReg.isVirtual() ? &LIS->getInterval(CmpReg) : nullptr; in optimizeVcndVcmpPair()
478 if (SavedExec.isVirtual() && MRI->hasOneNonDBGUse(SavedExec)) { in run()
500 if (Reg.isVirtual()) { in run()
/freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/
H A DFunction.cpp32 Virtual = CD->isVirtual(); in Function()
35 Virtual = CD->isVirtual(); in Function()
38 Virtual = MD->isVirtual(); in Function()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp138 if (Reg.isVirtual()) in usesRegClass()
194 if (!Reg.isVirtual()) in eraseInstrWithNoUses()
216 if (!DefReg.isVirtual()) { in eraseInstrWithNoUses()
250 if (DPRReg.isVirtual() && SPRReg.isVirtual()) { in optimizeSDPattern()
300 if (!OpReg.isVirtual()) in optimizeSDPattern()
344 if (!MI->getOperand(1).getReg().isVirtual()) in elideCopies()
370 if (!Reg.isVirtual()) { in elideCopiesAndPHIs()
379 if (!MI->getOperand(1).getReg().isVirtual()) in elideCopiesAndPHIs()
H A DMLxExpansionPass.cpp100 if (Reg.isVirtual()) { in getAccDefMI()
106 if (Reg.isVirtual()) { in getAccDefMI()
156 if (SrcReg.isVirtual()) { in hasLoopHazard()
164 if (Reg.isVirtual()) { in hasLoopHazard()
170 if (Reg.isVirtual()) { in hasLoopHazard()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h92 assert(virtReg.isVirtual()); in getPhys()
107 assert(virtReg.isVirtual()); in getShape()
118 assert(virtReg.isVirtual()); in clearVirt()
173 assert(virtReg.isVirtual()); in getStackSlot()
H A DRegister.h74 constexpr bool isVirtual() const { return isVirtualRegister(Reg); } in isVirtual() function
83 assert(isVirtual() && "Not a virtual register"); in virtRegIndex()
184 assert(Reg.isVirtual());
H A DMachineRegisterInfo.h117 if (RegNo.isVirtual()) in getRegUseDefListHead()
123 if (RegNo.isVirtual()) in getRegUseDefListHead()
226 assert(VReg.isVirtual() && "Must pass a VReg"); in shouldTrackSubRegLiveness()
769 if (Reg.isVirtual() && VRegToType.inBounds(Reg)) in getType()
802 assert(VReg.isVirtual()); in setRegAllocationHint()
813 assert(VReg.isVirtual()); in addRegAllocationHint()
835 assert(VReg.isVirtual()); in getRegAllocationHint()
846 assert(VReg.isVirtual()); in getSimpleHint()
855 assert(VReg.isVirtual()); in getRegAllocationHints()
1250 if (RegUnit.isVirtual()) { in PSetIterator()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGCall.h181 if (isVirtual()) in getAbstractInfo()
204 bool isVirtual() const { in isVirtual() function
208 assert(isVirtual()); in getVirtualCallExpr()
212 assert(isVirtual()); in getVirtualMethodDecl()
216 assert(isVirtual()); in getThisAddress()
220 assert(isVirtual()); in getVirtualFunctionType()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCSE.cpp180 if (!Reg.isVirtual()) in INITIALIZE_PASS_DEPENDENCY()
187 if (!SrcReg.isVirtual()) in INITIALIZE_PASS_DEPENDENCY()
294 if (Reg.isVirtual()) in hasLivePhysRegDefUses()
314 if (Reg.isVirtual()) in hasLivePhysRegDefUses()
387 if (MOReg.isVirtual()) in PhysRegDefsReach()
448 if (CSReg.isVirtual() && Reg.isVirtual()) { in isProfitableToCSE()
484 if (MO.getReg().isVirtual()) { in isProfitableToCSE()
648 assert(OldReg.isVirtual() && NewReg.isVirtual() && in ProcessBlockCSE()
811 if (MO.isReg() && !MO.getReg().isVirtual()) { in isPRECandidate()
H A DDetectDeadLanes.cpp113 if (!MOReg.isVirtual()) in addUsedLanesOnOperand()
137 if (!MO.isReg() || !MO.getReg().isVirtual()) in transferUsedLanesStep()
205 if (!DefReg.isVirtual()) in transferDefinedLanesStep()
306 assert(MOReg.isVirtual()); in determineInitialDefinedLanes()
350 if (DefReg.isVirtual()) { in determineInitialUsedLanes()
441 if (!DefReg.isVirtual()) in isUndefInput()
453 if (MOReg.isVirtual()) { in isUndefInput()
514 if (!Reg.isVirtual()) in modifySubRegisterOperandStatus()
H A DMIRCanonicalizerPass.cpp158 if (MO.getReg().isVirtual()) in rescheduleCanonically()
175 if (!MO.isReg() || !MO.getReg().isVirtual()) in rescheduleCanonically()
188 if (!II->getOperand(i).getReg().isVirtual()) in rescheduleCanonically()
310 if (!Dst.isVirtual()) in propagateLocalCopies()
312 if (!Src.isVirtual()) in propagateLocalCopies()
H A DRegAllocFast.cpp444 assert(Reg.isVirtual()); in shouldAllocateRegister()
879 assert(Reg.isVirtual()); in traceCopyChain()
997 assert(VirtReg.isVirtual() && "Expected virtreg"); in allocVirtRegUndef()
1073 assert(VirtReg.isVirtual() && "Not a virtual register"); in defineVirtReg()
1142 assert(VirtReg.isVirtual() && "Not a virtual register"); in useVirtReg()
1167 if (Hint.isVirtual()) { in useVirtReg()
1319 assert(VirtReg.isVirtual() && "Bad map key"); in dumpState()
1336 if (Reg.isVirtual()) { in addRegClassDefCounts()
1382 if (MO.isDef() && Reg.isVirtual() && shouldAllocateRegister(Reg)) in findAndSortDefOperandIndexes()
1479 if (Reg.isVirtual()) { in allocateInstruction()
[all …]
H A DMIRVRegNamerUtils.cpp78 if (MO.getReg().isVirtual()) in getInstructionOpcodeHash()
140 assert(VReg.isVirtual() && "Expected Virtual Registers"); in createVirtualRegister()
157 if (!MO.isReg() || !MO.getReg().isVirtual()) in renameInstsInMBB()
H A DVirtRegMap.cpp87 assert(virtReg.isVirtual() && physReg.isPhysical()); in assignVirt2Phys()
114 if (Hint.isVirtual()) in hasPreferredPhys()
123 if (Hint.second.isVirtual()) in hasKnownPreference()
129 assert(virtReg.isVirtual()); in assignVirt2StackSlot()
137 assert(virtReg.isVirtual()); in assignVirt2StackSlot()
487 if (DstReg.isVirtual()) in handleIdentityCopy()
654 if (!MO.isReg() || !MO.getReg().isVirtual()) in rewrite()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVVMV0Elimination.cpp127 Src.isVirtual() && "vmv0 use in unexpected form"); in runOnMachineFunction()
131 SrcMI->isCopy() && SrcMI->getOperand(1).getReg().isVirtual() && in runOnMachineFunction()
162 if (MO.isReg() && MO.getReg().isVirtual() && in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp109 return RA.getReg().isVirtual() || in checkOpConstraints()
119 if (!RT.getReg().isVirtual()) in checkOpConstraints()
172 if (!BT.isReg() || (!BT.getReg().isVirtual() && BT.getReg() != PPC::CR0)) in checkOpConstraints()
183 if (!BT.isReg() || (!BT.getReg().isVirtual() && BT.getReg() != PPC::CR0)) in checkOpConstraints()
H A DPPCMIPeephole.cpp188 if (!Reg.isVirtual()) in addRegToUpdateWithLine()
217 if (!Reg.isVirtual()) in getVRegDefOrNull()
360 if (!RegOp.isVirtual()) in collectUnprimedAccPHIs()
368 if (!Reg.isVirtual() || MRI->getRegClass(Reg) != &PPC::ACCRCRegClass) in collectUnprimedAccPHIs()
561 if (!Src.isVirtual() || !Dst.isVirtual()) in simplifyCode()
643 if (!(TrueReg1 == TrueReg2 && TrueReg1.isVirtual())) in simplifyCode()
662 if (FeedReg1.isVirtual()) { in simplifyCode()
696 if (!(FeedReg1 == FeedReg2 && FeedReg1.isVirtual())) in simplifyCode()
803 if (!TrueReg.isVirtual()) in simplifyCode()
813 if (!ConvReg.isVirtual()) in simplifyCode()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCopyPhysRegs.cpp76 if (DstReg.isVirtual() && in visitMBB()
86 else if (SrcReg.isVirtual() && in visitMBB()

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