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Searched refs:isLiveIn (Results 1 – 25 of 86) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegColoring.cpp272 if (MRI->isLiveIn(LHS->reg()) != MRI->isLiveIn(RHS->reg())) in runOnMachineFunction()
273 return MRI->isLiveIn(LHS->reg()); in runOnMachineFunction()
294 if (!MRI->isLiveIn(Old)) in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveVariables.h108 LLVM_ABI bool isLiveIn(const MachineBasicBlock &MBB, Register Reg,
285 bool isLiveIn(Register Reg, const MachineBasicBlock &MBB) { in isLiveIn() function
286 return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI); in isLiveIn()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanUtils.cpp76 if (V->isLiveIn()) in getSCEVExprForVPValue()
89 if (V->isLiveIn()) in isUniformAcrossVFsAndUFs()
H A DVPlanValue.h169 bool isLiveIn() const { return !hasDefiningRecipe(); } in isLiveIn() function
175 assert(isLiveIn() && in getLiveInIRValue()
H A DVPlan.cpp253 if (Def->isLiveIn()) in get()
286 assert((VF.isScalar() || Def->isLiveIn() || hasVectorValue(Def) || in get()
324 assert(Def->isLiveIn() && "expected a live-in"); in get()
1133 if (TripCount->isLiveIn()) in printLiveIns()
1260 if (TripCount && TripCount->isLiveIn()) in duplicate()
1530 if (V->isLiveIn() && isa<ConstantInt, ConstantFP>(UV)) in assignName()
1682 if (!V->isLiveIn()) in getOperandInfo()
H A DVPlanUtils.h59 if (VPV->isLiveIn()) in isSingleScalar()
H A DVPlanAnalysis.cpp37 if (TC->isLiveIn()) { in VPTypeAnalysis()
261 if (V->isLiveIn()) { in inferScalarType()
H A DVPlanTransforms.cpp751 !Step->isLiveIn() || !IVStep->isLiveIn()) in getOptimizableIVOf()
944 if (!Op->isLiveIn() || !Op->getLiveInIRValue()) in tryToFoldLiveIns()
1015 if (Op->isLiveIn()) in simplifyRecipe()
1345 if (!Plan.getTripCount()->isLiveIn()) in optimizeVectorInductionWidthForTCAndVFUF()
1875 if (!Op->isLiveIn()) { in truncateToMinimalBitwidths()
2737 ScalarStep->isLiveIn() in convertToConcreteRecipes()
2827 if (!IncomingFromEarlyExit->isLiveIn() && in handleUncountableEarlyExit()
3058 (VPV->isLiveIn() && VPV->getLiveInIRValue() && in materializeBroadcasts()
3143 if (VPV->isLiveIn()) in isAlreadyNarrow()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp182 if (Preheader->isLiveIn(PPC::CTR) || Preheader->isLiveIn(PPC::CTR8)) in processLoop()
H A DPPCPreEmitPeephole.cpp579 if (SuccMBB->isLiveIn(CRBit) || SuccMBB->isLiveIn(CRReg)) { in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DPHIElimination.cpp99 bool isLiveIn(Register Reg, const MachineBasicBlock *MBB);
811 ShouldSplit = ShouldSplit && !isLiveIn(Reg, &MBB); in SplitPHIEdges()
842 bool PHIEliminationImpl::isLiveIn(Register Reg, const MachineBasicBlock *MBB) { in isLiveIn() function in PHIEliminationImpl
848 return LV->isLiveIn(Reg, *MBB); in isLiveIn()
H A DImplicitNullChecks.cpp322 if (MBB->isLiveIn(*AR)) in AnyAliasLiveIn()
779 if (!Reg || MBB->isLiveIn(Reg)) in rewriteNullChecks()
788 if (!NC.getNotNullSucc()->isLiveIn(MO.getReg())) in rewriteNullChecks()
H A DMachineCycleAnalysis.cpp148 return Block->isLiveIn(Reg); in isCycleInvariant()
H A DLiveRangeCalc.cpp221 bool IsLiveIn = MBB->isLiveIn(PhysReg); in findReachingDefs()
223 IsLiveIn = MBB->isLiveIn(*Alias); in findReachingDefs()
H A DMachineLoopInfo.cpp270 } else if (getHeader()->isLiveIn(Reg)) { in isLoopInvariant()
H A DMachineLateInstrsCleanup.cpp158 if (!MBB->isLiveIn(Reg)) in clearKillsForDef()
H A DLivePhysRegs.cpp360 if (Succ->isLiveIn(Reg)) in isPhysRegUsedAfter()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp299 if (!MBB.isLiveIn(reg)) in remapRegsForLeafProc()
305 if (!MBB.isLiveIn(reg)) in remapRegsForLeafProc()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp851 bool isKill = !MRI.isLiveIn(Reg); in pushRegsToStack()
891 bool isKill = !MRI.isLiveIn(*HiRegToSave); in pushRegsToStack()
1075 bool LRLiveIn = MF.getRegInfo().isLiveIn(ARM::LR); in spillCalleeSavedRegisters()
1098 if (!MF.getRegInfo().isLiveIn(ArgReg)) in spillCalleeSavedRegisters()
1111 !MF.getRegInfo().isLiveIn(Reg) && !(hasFP(MF) && Reg == FPReg)) in spillCalleeSavedRegisters()
1114 if (!MF.getRegInfo().isLiveIn(ArgReg)) in spillCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeVGPRLiveRange.cpp261 if (!VI.isLiveIn(*Endif, MOReg, *MRI)) { in collectCandidateRegisters()
292 if (VI.isLiveIn(*Endif, Reg, *MRI)) { in collectCandidateRegisters()
387 OldVarInfo.isLiveIn(*Succ, MOReg, *MRI)) { in collectWaterfallCandidateRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVVMV0Elimination.cpp108 [](auto *Succ) { return Succ->isLiveIn(RISCV::V0); })) && in runOnMachineFunction()
H A DRISCVRedundantCopyElimination.cpp152 if (!MBB.isLiveIn(TargetReg)) in optimizeBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp308 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32); in addSavedGPR()
471 if (MF.front().isLiveIn(SystemZ::R6D) && in processFunctionBeforeFrameFinalized()
1345 if (!MBB.isLiveIn(Reg)) in emitPrologue()
1390 bool NeedSaveArg = PrologMBB.isLiveIn(SystemZ::R3D); in inlineStackProbe()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp417 if (SuccMBB->isLiveIn(AArch64::W16) || SuccMBB->isLiveIn(AArch64::X16)) in shouldUseFrameHelper()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp220 if (Succ->isLiveIn(X86::EFLAGS)) in flagsNeedToBePreservedBeforeTheTerminators()
361 UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS); in BuildStackAdjustment()
1035 const bool IsRCXLiveIn = MBB.isLiveIn(X86::RCX); in emitStackProbeInlineWindowsCoreCLR64()
1036 const bool IsRDXLiveIn = MBB.isLiveIn(X86::RDX); in emitStackProbeInlineWindowsCoreCLR64()
3040 if (MRI.isLiveIn(Reg)) in spillCalleeSavedRegisters()
3045 if (MRI.isLiveIn(*AReg)) in spillCalleeSavedRegisters()
3280 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForSegmentedStacks()
3417 SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2); in adjustForSegmentedStacks()
3421 assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) && in adjustForSegmentedStacks()
3682 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForHiPEPrologue()
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