| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrFormatsC.td | 375 bits<11> imm11; 378 let Inst{12} = imm11{10}; 379 let Inst{11} = imm11{3}; 380 let Inst{10-9} = imm11{8-7}; 381 let Inst{8} = imm11{9}; 382 let Inst{7} = imm11{5}; 383 let Inst{6} = imm11{6}; 384 let Inst{5-3} = imm11{2-0}; 385 let Inst{2} = imm11{4};
|
| H A D | RISCVInstrInfoXqci.td | 476 (ins GPRNoX0:$rs1, InTyImm11:$imm11), opcodestr, 477 "$rd, $rs1, $imm11"> { 478 bits<11> imm11; 481 let Inst{30-20} = imm11; 816 (ins GPRNoX0:$rs1, uimm11:$imm11), "qc.wrapi", 817 "$rd, $rs1, $imm11"> { 818 bits<11> imm11; 820 let imm12 = {0b0, imm11};
|
| H A D | RISCVInstrInfoC.td | 800 bare_simm12_lsb0:$imm11), 801 "$opcode, $funct3, $imm11">; 839 def : InstAlias<".insn_cj $opcode, $funct3, $imm11", 840 (InsnCJ uimm2_opcode:$opcode, uimm3:$funct3, bare_simm12_lsb0:$imm11)>;
|
| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | RISCV.cpp | 364 uint16_t imm11 = extractBits(val, 11, 11) << 12; in relocate() local 372 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; in relocate() 385 uint32_t imm11 = extractBits(val, 11, 11) << 20; in relocate() local 387 insn |= imm20 | imm10_1 | imm11 | imm19_12; in relocate() 401 uint32_t imm11 = extractBits(val, 11, 11) << 7; in relocate() local 402 insn |= imm12 | imm10_5 | imm4_1 | imm11; in relocate()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrFormats.td | 99 // Format I instruction class in Mips : <|opcode|imm11|> 106 bits<11> imm11; 110 let Inst{10-0} = imm11;
|
| H A D | Mips16InstrInfo.td | 54 FI16<op, (outs), (ins brtarget:$imm11), 55 !strconcat(asmstr, "\t$imm11 # 16 bit inst"), [], itin>;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchLASXInstrFormats.td | 376 bits<11> imm11; 381 let Inst{20-10} = imm11;
|
| H A D | LoongArchLSXInstrFormats.td | 403 bits<11> imm11; 408 let Inst{20-10} = imm11;
|
| H A D | LoongArchLASXInstrInfo.td | 191 : Fmt2RI11_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm11), 192 "$xd, $rj, $imm11">;
|
| H A D | LoongArchLSXInstrInfo.td | 398 : Fmt2RI11_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm11), 399 "$vd, $rj, $imm11">;
|
| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 2036 uint32_t imm11 = Bits32(opcode, 10, 0); in EmulateBLXImmediate() local 2040 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); in EmulateBLXImmediate() 2842 uint32_t imm11 = Bits32(opcode, 10, 0); in EmulateB() local 2844 (S << 20) | (J2 << 19) | (J1 << 18) | (imm6 << 12) | (imm11 << 1); in EmulateB() 2855 uint32_t imm11 = Bits32(opcode, 10, 0); in EmulateB() local 2859 (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); in EmulateB()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2908 unsigned imm11 = fieldFromInstruction(Insn, 0, 11); in DecodeT2BInstruction() local 2909 unsigned tmp = (S << 23) | (I1 << 22) | (I2 << 21) | (imm10 << 11) | imm11; in DecodeT2BInstruction()
|