Searched refs:getPointerReg (Results 1 – 9 of 9) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.cpp | 110 BaseIndexOffset BasePtr0 = getPointerInfo(LdSt1->getPointerReg(), MRI); in aliasIsKnownForLoadStore() 111 BaseIndexOffset BasePtr1 = getPointerInfo(LdSt2->getPointerReg(), MRI); in aliasIsKnownForLoadStore() 204 if (!mi_match(LS->getPointerReg(), MRI, in instMayAlias() 206 BaseReg = LS->getPointerReg(); in instMayAlias() 307 LLT PtrTy = MRI->getType(StoresToMerge[0]->getPointerReg()); in mergeStores() 413 Builder.buildStore(WideReg, FirstStore->getPointerReg(), *WideMMO); in doSingleStoreMerge() 514 LLT PtrTy = MRI->getType(StoreMI.getPointerReg()); in addStoreToCandidate() 530 Register StoreAddr = StoreMI.getPointerReg(); in addStoreToCandidate() 557 if (MRI->getType(C.Stores[0]->getPointerReg()).getAddressSpace() != in addStoreToCandidate() 741 if (!mi_match(LastStore.getPointerReg(), *MRI, in mergeTruncStore() [all …]
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| H A D | CombinerHelper.cpp | 824 LLT SrcTy = MRI.getType(LoadMI->getPointerReg()); in matchCombineExtendingLoads() 986 Register PtrReg = LoadMI->getPointerReg(); in matchCombineLoadWithAndMask() 1138 MRI.getType(LoadDef->getPointerReg())}, in matchSextInRegOfLoad() 1166 LoadDef->getPointerReg(), *NewMMO); in applySextInRegOfLoad() 1179 auto *Addr = getOpcodeDef<GPtrAdd>(MI->getPointerReg(), MRI); in canFoldInAddressingMode() 1213 LLT PtrTy = MRI.getType(LdSt.getPointerReg()); in isIndexedLoadStoreLegal() 1245 Register Ptr = LdSt.getPointerReg(); in findPostIndexCandidate() 1337 Addr = LdSt.getPointerReg(); in findPreIndexCandidate() 1453 Register VecPtr = LoadMI->getPointerReg(); in matchCombineExtractedVectorLoad() 1482 LoadMI->getPointerReg(), MRI.getType(LoadMI->getOperand(0).getReg()), in matchCombineExtractedVectorLoad() [all …]
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| H A D | LegalizerHelper.cpp | 1627 MIRBuilder.buildLoad(TmpReg, LoadMI.getPointerReg(), LoadMI.getMMO()); in narrowScalar() 1639 Register PtrReg = LoadMI.getPointerReg(); in narrowScalar() 1679 MIRBuilder.buildStore(TmpReg, StoreMI.getPointerReg(), StoreMI.getMMO()); in narrowScalar() 4049 Register PtrReg = LoadMI.getPointerReg(); in lowerLoad() 4206 Register PtrReg = StoreMI.getPointerReg(); in lowerStore() 4296 Register PtrReg = StoreMI.getPointerReg(); in scalarizeVectorBooleanStore() 5306 Register AddrReg = LdStMI.getPointerReg(); in reduceLoadStoreWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 333 Register PtrReg = Store.getPointerReg(); in applySplitStoreZero128() 722 auto NewPtr = MIB.buildPtrAdd(MRI.getType(SInfo.St->getPointerReg()), in tryOptimizeConsecStores() 843 Register PtrReg = St->getPointerReg(); in optimizeConsecutiveMemOpAddressing()
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| H A D | AArch64CallLowering.cpp | 324 Register LoadReg = Load->getPointerReg(); in shouldLowerTailCallStackArg()
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| H A D | AArch64InstructionSelector.cpp | 3011 LLT PtrTy = MRI.getType(LdSt.getPointerReg()); in select() 3058 const Register PtrReg = LdSt.getPointerReg(); in select()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 87 Register getPointerReg() const { return getOperand(1).getReg(); } in getPointerReg() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 731 LLT PtrTy = MRI.getType(LdSt.getPointerReg()); in select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 1107 Register PtrReg = LoadMI->getPointerReg(); in select()
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