Home
last modified time | relevance | path

Searched refs:getMinSVEVectorSizeInBits (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.h406 unsigned getMinSVEVectorSizeInBits() const { in getMinSVEVectorSizeInBits() function
427 return !isNeonAvailable() || getMinSVEVectorSizeInBits() >= 256; in useSVEForFixedLengthVectors()
H A DAArch64ISelLowering.cpp5557 DAG.getSubtarget<AArch64Subtarget>().getMinSVEVectorSizeInBits(), 128u); in optimizeIncrementingWhile()
7608 if (VT.getFixedSizeInBits() > Subtarget->getMinSVEVectorSizeInBits()) in useSVEForFixedLengthVectorVT()
14518 unsigned MinSVESize = Subtarget.getMinSVEVectorSizeInBits(); in isAllActivePredicate()
17015 VecSize = std::max(Subtarget->getMinSVEVectorSizeInBits(), 128u); in getNumInterleavedAccesses()
17060 std::max(Subtarget->getMinSVEVectorSizeInBits(), 128u); in isLegalInterleavedAccessType()
17217 if (Subtarget->getMinSVEVectorSizeInBits() == in lowerInterleavedLoad()
17219 Subtarget->getMinSVEVectorSizeInBits() == DL.getTypeSizeInBits(FVTy)) in lowerInterleavedLoad()
17415 if (Subtarget->getMinSVEVectorSizeInBits() == in lowerInterleavedStore()
17417 Subtarget->getMinSVEVectorSizeInBits() == in lowerInterleavedStore()
23051 unsigned MinSVESize = Subtarget->getMinSVEVectorSizeInBits(); in performUnpackCombine()
[all …]
H A DAArch64TargetTransformInfo.cpp2888 std::max(ST->getMinSVEVectorSizeInBits(), 128u)); in getRegisterBitWidth()