| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 65 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| H A D | X86RegisterInfo.cpp | 100 X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in X86RegisterInfo
109 return X86GenRegisterInfo::getMatchingSuperRegClass(A, B, SubIdx); in getMatchingSuperRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 102 return !TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSubIdx); in isCrossCopy()
104 return !TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSubIdx); in isCrossCopy()
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| H A D | TargetRegisterInfo.cpp | 338 TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in TargetRegisterInfo
445 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
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| H A D | MachineCombiner.cpp | 175 return TRI->getMatchingSuperRegClass(SrcRC, DstRC, SrcSub) != nullptr; in isTransientMI()
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| H A D | TailDuplicator.cpp | 431 TRI->getMatchingSuperRegClass(MappedRC, OrigRC, VI->second.SubReg); in duplicateInstruction()
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| H A D | RegisterCoalescer.cpp | 516 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub); in setRegisters()
520 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub); in setRegisters()
1519 NewRC = TRI->getMatchingSuperRegClass(NewRC, DefRC, NewIdx); in reMaterializeTrivialDef()
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| H A D | TwoAddressInstructionPass.cpp | 1610 assert(TRI->getMatchingSuperRegClass(RC, MRI->getRegClass(RegA), in processTiedPairs()
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| H A D | MachineInstr.cpp | 1048 CurRC = TRI->getMatchingSuperRegClass(CurRC, OpRC, SubIdx); in getRegClassConstraintEffect()
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| H A D | MachineVerifier.cpp | 2763 DRC = TRI->getMatchingSuperRegClass(SuperRC, DRC, SubIdx); in visitMachineOperand()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 677 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1847 const TargetRegisterClass *DestSuperRC = TRI->getMatchingSuperRegClass( in foldCopyToAGPRRegSequence()
1868 TRI->getMatchingSuperRegClass(DefRC, InputRC, SubRegIdx); in foldCopyToAGPRRegSequence()
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| H A D | SIInstrInfo.h | 1521 return RC == TRI->getMatchingSuperRegClass(RC, &TRC, P.SubReg); in isOfRegClass()
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| H A D | SIInstrInfo.cpp | 5963 DRC = RI.getMatchingSuperRegClass(SuperRC, DRC, MO.getSubReg()); in isLegalRegOperand()
7301 if (RI.getMatchingSuperRegClass(CurrRC, ExpectedRC, AMDGPU::lo16)) { in legalizeOperandsVALUt16()
7303 } else if (RI.getMatchingSuperRegClass(ExpectedRC, CurrRC, AMDGPU::lo16)) { in legalizeOperandsVALUt16()
7872 if (RI.getMatchingSuperRegClass(NewDstRC, SrcRegRC, AMDGPU::lo16)) { in moveToVALUImpl()
7887 } else if (RI.getMatchingSuperRegClass(SrcRegRC, NewDstRC, in moveToVALUImpl()
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| H A D | SIRegisterInfo.cpp | 3634 getMatchingSuperRegClass(SuperRC, SubRC, SubIdx); in getCompatibleSubRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 680 TRI->getMatchingSuperRegClass(RC, TRC, SubIdx); in EmitRegSequence()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/ |
| H A D | DemangleTestCases.inc | 13099 …ClassEPKNS_19TargetRegisterClassES3_j", "llvm::X86RegisterInfo::getMatchingSuperRegClass(llvm::Tar…
13596 …sEPKNS_19TargetRegisterClassES3_j", "llvm::ARMBaseRegisterInfo::getMatchingSuperRegClass(llvm::Tar…
14279 …ssEPKNS_19TargetRegisterClassES3_j", "llvm::TargetRegisterInfo::getMatchingSuperRegClass(llvm::Tar…
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