| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 1510 const SDValue &getBasePtr() const { 1599 const SDValue &getBasePtr() const { 2564 const SDValue &getBasePtr() const { return getOperand(1); } 2592 const SDValue &getBasePtr() const { return getOperand(2); } 2627 const SDValue &getBasePtr() const { 2696 const SDValue &getBasePtr() const { return getOperand(1); } 2725 const SDValue &getBasePtr() const { return getOperand(1); } 2762 const SDValue &getBasePtr() const { return getOperand(2); } 2798 const SDValue &getBasePtr() const { return getOperand(2); } 2868 const SDValue &getBasePtr() const { return getOperand(1); } [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGAddressAnalysis.cpp | 200 SDValue Ptr = N->getBasePtr(); in matchLSNode() 253 Base = DAG.getTargetLoweringInfo().unwrapAddress(LSBase->getBasePtr()); in matchLSNode()
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| H A D | LegalizeVectorTypes.cpp | 464 N->getBasePtr(), DAG.getUNDEF(N->getBasePtr().getValueType()), in ScalarizeVecRes_LOAD() 998 N->getBasePtr(), N->getPointerInfo(), in ScalarizeVecOp_STORE() 1003 N->getBasePtr(), N->getPointerInfo(), N->getBaseAlign(), in ScalarizeVecOp_STORE() 2112 SDValue Ptr = LD->getBasePtr(); in SplitVecRes_LOAD() 2158 SDValue Ptr = LD->getBasePtr(); in SplitVecRes_VP_LOAD() 2265 SLD->getChain(), SLD->getBasePtr(), SLD->getOffset(), SLD->getStride(), in SplitVecRes_VP_STRIDED_LOAD() 2278 EVT PtrVT = SLD->getBasePtr().getValueType(); in SplitVecRes_VP_STRIDED_LOAD() 2283 DAG.getNode(ISD::ADD, DL, PtrVT, SLD->getBasePtr(), Increment); in SplitVecRes_VP_STRIDED_LOAD() 2319 SDValue Ptr = MLD->getBasePtr(); in SplitVecRes_MLOAD() 2402 SDValue Ptr = N->getBasePtr(); in SplitVecRes_Gather() [all …]
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| H A D | DAGCombiner.cpp | 1128 LoadStore && LoadStore->getBasePtr().getNode() == N) { in reassociationCanBreakAddressingModePattern() 1495 LD->getChain(), LD->getBasePtr(), in PromoteOperand() 1731 LD->getChain(), LD->getBasePtr(), in PromoteLoad() 2411 if (LD->isIndexed() || LD->getBasePtr().getNode() != N) in canFoldInAddressingMode() 2416 if (ST->isIndexed() || ST->getBasePtr().getNode() != N) in canFoldInAddressingMode() 2421 if (LD->isIndexed() || LD->getBasePtr().getNode() != N) in canFoldInAddressingMode() 2426 if (ST->isIndexed() || ST->getBasePtr().getNode() != N) in canFoldInAddressingMode() 6881 EVT PtrType = LDST->getBasePtr().getValueType(); in isLegalNarrowLdSt() 7413 ExtVT, DL, MLoad->getChain(), MLoad->getBasePtr(), in visitAND() 7584 Load->getChain(), Load->getBasePtr(), in visitAND() [all …]
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| H A D | LegalizeFloatTypes.cpp | 996 L->getChain(), L->getBasePtr(), L->getOffset(), in SoftenFloatRes_LOAD() 1007 dl, L->getChain(), L->getBasePtr(), L->getOffset(), in SoftenFloatRes_LOAD() 1026 {L->getChain(), L->getBasePtr()}, L->getMemOperand()); in SoftenFloatRes_ATOMIC_LOAD() 1396 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(), in SoftenFloatOp_STORE() 1411 ST->getBasePtr(), ST->getMemOperand()); in SoftenFloatOp_ATOMIC_STORE() 2141 SDValue Ptr = LD->getBasePtr(); in ExpandFloatRes_LOAD() 2499 SDValue Ptr = ST->getBasePtr(); in ExpandFloatOp_STORE() 2772 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(), in PromoteFloatOp_STORE() 2790 ST->getBasePtr(), ST->getMemOperand()); in PromoteFloatOp_ATOMIC_STORE() 3167 L->getChain(), L->getBasePtr(), L->getOffset(), L->getPointerInfo(), IVT, in PromoteFloatRes_LOAD() [all …]
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| H A D | LegalizeTypesGeneric.cpp | 257 SDValue Ptr = LD->getBasePtr(); in ExpandRes_NormalLoad() 485 SDValue Ptr = St->getBasePtr(); in ExpandOp_NormalStore()
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| H A D | StatepointLowering.cpp | 554 LPadPointers.insert(Builder.getValue(Relocate->getBasePtr())); in lowerStatepointMetaArgs() 1073 SI.Bases.push_back(Relocate->getBasePtr()); in LowerStatepoint()
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| H A D | LegalizeIntegerTypes.cpp | 408 N->getChain(), N->getBasePtr(), N->getMemOperand()); in PromoteIntRes_Atomic0() 420 N->getChain(), N->getBasePtr(), in PromoteIntRes_Atomic1() 443 N->getChain(), N->getBasePtr(), N->getOperand(2), N->getOperand(3), in PromoteIntRes_AtomicCmpSwap() 472 N->getBasePtr(), Op2, Op3, N->getMemOperand()); in PromoteIntRes_AtomicCmpSwap() 971 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD() 988 DAG.getExtLoadVP(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_VP_LOAD() 1006 SDValue Res = DAG.getMaskedLoad(NVT, dl, N->getChain(), N->getBasePtr(), in PromoteIntRes_MLOAD() 1028 SDValue Ops[] = {N->getChain(), ExtPassThru, N->getMask(), N->getBasePtr(), in PromoteIntRes_MGATHER() 2201 N->getChain(), Op1, N->getBasePtr(), N->getMemOperand()); in PromoteIntOp_ATOMIC_STORE() 2456 SDValue Ch = N->getChain(), Ptr = N->getBasePtr(); in PromoteIntOp_STORE() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 182 LD->getBasePtr(), LD->getChain()); in selectIndexedLoad() 335 SDValue BasePtr = ST->getBasePtr(); in select() 388 SDValue Ptr = LD->getBasePtr(); in select()
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| H A D | AVRISelLowering.cpp | 1025 Op = LD->getBasePtr().getNode(); in getPreIndexedAddressParts() 1033 Op = ST->getBasePtr().getNode(); in getPreIndexedAddressParts() 1082 Ptr = LD->getBasePtr(); in getPostIndexedAddressParts() 1087 Ptr = ST->getBasePtr(); in getPostIndexedAddressParts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1265 if (!selectBDVAddr12Only(Load->getBasePtr(), ElemV, Base, Disp, Index) || in tryGather() 1299 if (!selectBDVAddr12Only(Store->getBasePtr(), ElemV, Base, Disp, Index) || in tryScatter() 1343 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern() 1460 if (!selectBDAddr20Only(StoreNode->getBasePtr(), Base, Disp)) in tryFoldLoadStoreIntoMemOperand() 1515 if (SystemZISD::isPCREL(Load->getBasePtr().getOpcode())) in storeLoadCanUseMVC() 1518 if (SystemZISD::isPCREL(Store->getBasePtr().getOpcode())) in storeLoadCanUseMVC() 1539 SDValue BasePtr = MemAccess->getBasePtr(); in storeLoadIsAligned() 1792 AtomOp->getBasePtr(), AtomOp->getMemoryVT(), AtomOp->getMemOperand())); in Select()
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| H A D | SystemZISelLowering.cpp | 2898 Load->getBasePtr(), Load->getPointerInfo(), in adjustSubwordCmp() 4295 LoadN->getBasePtr(), LoadN->getMemOperand()); in lowerBITCAST() 5087 SDValue Addr = Node->getBasePtr(); in lowerATOMIC_LOAD_OP() 5149 Node->getChain(), Node->getBasePtr(), NegSrc2, in lowerATOMIC_LOAD_SUB() 6923 AtomicLd->getChain(), AtomicLd->getBasePtr(), in lowerLoadF16() 6929 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::i16, in lowerLoadF16() 6944 Shft, AtomicSt->getBasePtr(), in lowerStoreF16() 6948 return DAG.getTruncStore(St->getChain(), DL, Shft, St->getBasePtr(), MVT::i16, in lowerStoreF16() 7921 MVT LoadNodeVT = LN->getBasePtr().getSimpleValueType(); in combineLOAD() 7925 DL, PtrVT, LN->getBasePtr(), SYSTEMZAS::PTR32, 0); in combineLOAD() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 350 LD->getBasePtr(), LD->getChain())); in tryIndexedLoad() 366 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() }; in tryIndexedBinOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 1322 DAG.getLoad(MVT::f64, DL, LdNode->getChain(), LdNode->getBasePtr(), in lowerLoadF128() 1326 EVT AddrVT = LdNode->getBasePtr().getValueType(); in lowerLoadF128() 1327 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, LdNode->getBasePtr(), in lowerLoadF128() 1363 SDValue BasePtr = LdNode->getBasePtr(); in lowerLoadI1() 1426 SDValue BasePtr = LdNode->getBasePtr(); in lowerLOAD() 1463 StNode->getBasePtr(), MachinePointerInfo(), Alignment, in lowerStoreF128() 1466 EVT AddrVT = StNode->getBasePtr().getValueType(); in lowerStoreF128() 1467 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, StNode->getBasePtr(), in lowerStoreF128() 1488 SDValue BasePtr = StNode->getBasePtr(); in lowerStoreI1() 1539 SDValue BasePtr = StNode->getBasePtr(); in lowerSTORE()
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| H A D | VECustomDAG.cpp | 232 return MemN->getBasePtr(); in getMemoryPtr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1041 SDValue BasePtr = Store->getBasePtr(); in lowerPrivateTruncStore() 1113 SDValue Ptr = StoreNode->getBasePtr(); in LowerSTORE() 1273 SDValue BasePtr = Load->getBasePtr(); in lowerPrivateExtLoad() 1335 SDValue Ptr = LoadNode->getBasePtr(); in LowerLOAD() 1676 SDValue Ptr = LoadNode->getBasePtr(); in constBufferLoad() 1935 SDValue Ptr = LoadNode->getBasePtr(); in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 330 GCR->getBasePtr(), GCR->getDerivedPtr()); in getHashValueImpl() 412 GCR1->getBasePtr() == GCR2->getBasePtr() && in isEqualImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 78 SDValue Base = LD->getBasePtr(); in INITIALIZE_PASS() 476 SDValue Base = ST->getBasePtr(); in SelectIndexedStore() 1111 SDValue LDBasePtr = cast<MemSDNode>(SYNode)->getBasePtr(); in isMemOPCandidate() 1112 SDValue STBasePtr = cast<MemSDNode>(UUse)->getBasePtr(); in isMemOPCandidate() 2417 SDValue BasePtr = cast<MemSDNode>(N)->getBasePtr(); in rebalanceAddressTrees()
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| H A D | HexagonISelLowering.cpp | 3135 LN->getBasePtr(), LN->getOffset(), LN->getPointerInfo(), in LowerLoad() 3142 if (!validateConstPtrAlignment(LN->getBasePtr(), ClaimAlign, dl, DAG)) in LowerLoad() 3171 SDValue NS = DAG.getTruncStore(SN->getChain(), dl, TR, SN->getBasePtr(), in LowerStore() 3174 NS = DAG.getIndexedStore(NS, dl, SN->getBasePtr(), SN->getOffset(), in LowerStore() 3181 if (!validateConstPtrAlignment(SN->getBasePtr(), ClaimAlign, dl, DAG)) in LowerStore() 3238 SDValue Base = LN->getBasePtr(); in LowerUnalignedLoad() 3883 std::pair<SDValue, int> BO = getBaseAndOffset(L->getBasePtr()); in shouldReduceLoadWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2928 DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LdNode->getBasePtr(), in LowerF128Load() 2930 EVT addrVT = LdNode->getBasePtr().getValueType(); in LowerF128Load() 2932 LdNode->getBasePtr(), in LowerF128Load() 2996 StNode->getBasePtr(), StNode->getPointerInfo(), in LowerF128Store() 2998 EVT addrVT = StNode->getBasePtr().getValueType(); in LowerF128Store() 3000 StNode->getBasePtr(), in LowerF128Store() 3022 St->getChain(), dl, Val, St->getBasePtr(), St->getPointerInfo(), in LowerSTORE() 3509 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getBaseAlign(), in ReplaceNodeResults()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 388 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() 461 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE() 1676 return DAG.getMemmove(Chain, dl, ST->getBasePtr(), LD->getBasePtr(), in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5739 Ld->getBasePtr(), TypeSize::getFixed(Offset), DL); in lowerVECTOR_SHUFFLE() 6534 SDValue L = DAG.getLoad(NewVT, DL, Load->getChain(), Load->getBasePtr(), in expandUnalignedRVVLoad() 6566 return DAG.getStore(Store->getChain(), DL, StoredVal, Store->getBasePtr(), in expandUnalignedRVVStore() 7893 SDValue BasePtr = Load->getBasePtr(); in LowerOperation() 7922 SDValue BasePtr = Load->getBasePtr(); in LowerOperation() 7959 SDValue BasePtr = Store->getBasePtr(); in LowerOperation() 7991 {Store->getChain(), Lo, Hi, Store->getBasePtr()}, MVT::i64, in LowerOperation() 8007 SDValue BasePtr = Store->getBasePtr(); in LowerOperation() 12434 DAG.getLoad(ContainerVT, DL, Load->getChain(), Load->getBasePtr(), in lowerFixedLengthVectorLoadToRVV() 12449 Ops.push_back(Load->getBasePtr()); in lowerFixedLengthVectorLoadToRVV() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6488 SDValue BasePtr = MGT->getBasePtr(); in LowerMGATHER() 6587 SDValue BasePtr = MSC->getBasePtr(); in LowerMSCATTER() 6676 VT, DL, LoadNode->getChain(), LoadNode->getBasePtr(), in LowerMLOAD() 6715 ST->getBasePtr(), ST->getMemOperand()); in LowerTruncateVectorStore() 6804 {StoreNode->getChain(), Lo, Hi, StoreNode->getBasePtr()}, in LowerSTORE() 6814 SDValue Base = StoreNode->getBasePtr(); in LowerSTORE() 6857 StoreNode->getBasePtr()}, in LowerStore128() 6870 SDValue Base = LoadNode->getBasePtr(); in LowerLOAD() 6907 LoadNode->getBasePtr(), MachinePointerInfo()); in LowerLOAD() 8656 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) in addTokenForArgument() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3257 SDValue BasePtr = cast<LoadSDNode>(Load)->getBasePtr(); in shouldReduceLoadWidth() 4964 return getTargetConstantFromBasePtr(Load->getBasePtr()); in getTargetConstantFromNode() 5163 SDValue Ptr = MemIntr->getBasePtr(); in getTargetConstantBitsFromNode() 5184 SDValue Ptr = MemIntr->getBasePtr(); in getTargetConstantBitsFromNode() 6733 SDValue Ptr = DAG.getMemBasePlusOffset(Mem->getBasePtr(), in getBROADCAST_LOAD() 7132 SDValue Ptr = LD->getBasePtr(); in LowerAsSplatVectorLoad() 7359 DAG.getLoad(VT, DL, LDBase->getChain(), LDBase->getBasePtr(), in EltsFromConsecutiveLoads() 7445 SDValue Ops[] = { LDBase->getChain(), LDBase->getBasePtr() }; in EltsFromConsecutiveLoads() 7846 SDValue Ops[] = {LN->getChain(), LN->getBasePtr()}; in lowerBuildVectorAsBroadcast() 7860 SDValue Ops[] = {LN->getChain(), LN->getBasePtr()}; in lowerBuildVectorAsBroadcast() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3073 Ptr = LD->getBasePtr(); in getPreIndexedAddressParts() 3077 Ptr = ST->getBasePtr(); in getPreIndexedAddressParts() 8102 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() 8127 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE() 8636 RLI.Ptr = LD->getBasePtr(); in canReuseLoadAddress() 9790 LD->getBasePtr(), // Ptr in LowerBUILD_VECTOR() 10454 SDValue BasePtr = LD->getBasePtr(); in LowerVECTOR_SHUFFLE() 11981 SDValue BasePtr = LN->getBasePtr(); in LowerDMFVectorLoad() 12069 SDValue BasePtr = LN->getBasePtr(); in LowerVectorLoad() 12118 SDValue BasePtr = SN->getBasePtr(); in LowerDMFVectorStore() [all …]
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