| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveInterval.h | 522 return beginIndex() > Start.getBaseIndex() && in isLocal()
547 const_iterator I = find(Idx.getBaseIndex()); in Query()
559 if (I->start <= Idx.getBaseIndex()) { in Query()
572 if (EarlyVal->def == Idx.getBaseIndex()) in Query()
592 if (Indexes->getNextNonNullIndex(S.start).getBaseIndex() < in isZeroLength()
593 S.end.getBaseIndex()) in isZeroLength()
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| H A D | SlotIndexes.h | 225 SlotIndex getBaseIndex() const { in getBaseIndex() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 301 InstrSI = LIS.getInstructionIndex(MI).getBaseIndex(); in collectVirtualRegUses()
497 LIS, *MRI, true, RegUnit, Pos.getBaseIndex(), LaneBitmask::getNone(), in getLastUsedLanes()
597 : LIS.getInstructionIndex(*NextMI).getBaseIndex(); in advanceBeforeNext()
599 SI = LIS.getInstructionIndex(*MI).getBaseIndex(); in advanceBeforeNext()
787 const auto &SI = LIS.getInstructionIndex(*LastTrackedMI).getBaseIndex(); in isValid()
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| H A D | GCNRegPressure.h | 450 Indexes.push_back(After ? SI.getDeadSlot() : SI.getBaseIndex()); in getLiveRegMap()
489 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS, in getLiveRegsBefore()
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| H A D | SIWholeQuadMode.cpp | 1121 SlotIndex Next = S->start.getBaseIndex(); in prepareInsertion()
1126 MachineInstr *EndMI = LIS->getInstructionFromIndex(S->end.getBaseIndex()); in prepareInsertion()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveIntervals.cpp | 1150 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex()); in handleMoveDown()
1177 LR.advanceTo(Next, NewIdx.getBaseIndex()); in handleMoveDown()
1324 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex()); in handleMoveUp()
1390 assert(NewIdxIn == LR.find(NewIdx.getBaseIndex())); in handleMoveUp()
1789 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex()); in removeVRegDefAt()
1796 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex()) in removeVRegDefAt()
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| H A D | RenameIndependentSubregs.cpp | 197 : Pos.getBaseIndex(); in findComponents()
231 : Pos.getBaseIndex(); in rewriteOperands()
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| H A D | VirtRegMap.cpp | 585 SlotIndex BeforeMIUses = MIIndex.getBaseIndex(); in subRegLiveThrough()
626 SlotIndex BeforeMIUses = MIIndex.getBaseIndex(); in liveOutUndefPhiLanesForUndefSubregDef()
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| H A D | SplitKit.cpp | 703 Idx = Idx.getBaseIndex(); in enterIntvBefore()
819 Idx = Idx.getBaseIndex(); in leaveIntvBefore()
1732 LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) { in splitLiveThroughBlock()
1895 if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) { in splitRegOutBlock()
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| H A D | RegisterPressure.cpp | 618 LaneMask = getLiveLanesAt(LIS, MRI, true, RegUnit, Pos.getBaseIndex()); in adjustLaneLiveness()
1247 Pos.getBaseIndex(), LaneBitmask::getNone(), in getLastUsedLanes()
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| H A D | RegAllocGreedy.cpp | 1634 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr; in calcGapWeights()
1667 if (Uses[Gap+1].getBaseIndex() >= IntI.stop()) in calcGapWeights()
1691 if (Uses[Gap+1].getBaseIndex() >= I->end) in calcGapWeights()
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| H A D | InlineSpiller.cpp | 649 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex()); in reMaterializeFor()
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| H A D | RegisterCoalescer.cpp | 1037 if (S->start.getBaseIndex() == CopyIdx.getBaseIndex()) in removeCopyByCommutingDef()
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| H A D | LiveDebugVariables.cpp | 1639 Idx = Idx.getBaseIndex(); in findInsertLocation()
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| H A D | TwoAddressInstructionPass.cpp | 1709 if (S->end.getBaseIndex() != UseIdx) in processTiedPairs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 369 for (SlotIndex I = S.start.getBaseIndex(), E = S.end.getBaseIndex(); in shouldCoalesce()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 3662 static unsigned getBaseIndex(const CXXRecordDecl *Derived, in getBaseIndex() function
4140 O = &O->getStructBase(getBaseIndex(Derived, Base)); in findSubobject()
10779 Value = &Value->getStructBase(getBaseIndex(RD, Base)); in VisitCastExpr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1207 if (S->end.getBaseIndex() == Idx) in classifyLEAReg()
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