Home
last modified time | relevance | path

Searched refs:fixed_vector (Results 1 – 25 of 33) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankLegalizeHelper.h47 static constexpr LLT V2S16 = LLT::fixed_vector(2, 16);
48 static constexpr LLT V4S16 = LLT::fixed_vector(4, 16);
49 static constexpr LLT V6S16 = LLT::fixed_vector(6, 16);
50 static constexpr LLT V8S16 = LLT::fixed_vector(8, 16);
51 static constexpr LLT V16S16 = LLT::fixed_vector(16, 16);
52 static constexpr LLT V32S16 = LLT::fixed_vector(32, 16);
54 static constexpr LLT V2S32 = LLT::fixed_vector(2, 32);
55 static constexpr LLT V3S32 = LLT::fixed_vector(3, 32);
56 static constexpr LLT V4S32 = LLT::fixed_vector(4, 32);
57 static constexpr LLT V6S32 = LLT::fixed_vector(6, 32);
[all …]
H A DAMDGPURegBankLegalizeHelper.cpp488 B128 = LLT::fixed_vector(128 / EltTy.getSizeInBits(), EltTy); in lower()
575 return LLT::fixed_vector(2, 16); in getTyFromID()
578 return LLT::fixed_vector(2, 32); in getTyFromID()
582 return LLT::fixed_vector(4, 32); in getTyFromID()
593 if (Ty == LLT::scalar(32) || Ty == LLT::fixed_vector(2, 16) || in getBTyFromID()
609 if (Ty == LLT::scalar(64) || Ty == LLT::fixed_vector(2, 32) || in getBTyFromID()
610 Ty == LLT::fixed_vector(4, 16) || isAnyPtr(Ty, 64)) in getBTyFromID()
616 if (Ty == LLT::scalar(96) || Ty == LLT::fixed_vector(3, 32) || in getBTyFromID()
617 Ty == LLT::fixed_vector(6, 16)) in getBTyFromID()
623 if (Ty == LLT::scalar(128) || Ty == LLT::fixed_vector(4, 32) || in getBTyFromID()
[all …]
H A DAMDGPURegBankLegalizeRules.cpp76 return MRI.getType(Reg) == LLT::fixed_vector(2, 32); in matchUniformityAndLLT()
78 return MRI.getType(Reg) == LLT::fixed_vector(4, 32); in matchUniformityAndLLT()
118 return MRI.getType(Reg) == LLT::fixed_vector(2, 16) && MUI.isUniform(Reg); in matchUniformityAndLLT()
158 return MRI.getType(Reg) == LLT::fixed_vector(2, 16) && MUI.isDivergent(Reg); in matchUniformityAndLLT()
217 if (Ty == LLT::fixed_vector(2, 16)) in LLTToId()
219 if (Ty == LLT::fixed_vector(2, 32)) in LLTToId()
221 if (Ty == LLT::fixed_vector(3, 32)) in LLTToId()
223 if (Ty == LLT::fixed_vector(4, 32)) in LLTToId()
229 if (Ty == LLT::scalar(32) || Ty == LLT::fixed_vector(2, 16) || in LLTToBId()
232 if (Ty == LLT::scalar(64) || Ty == LLT::fixed_vector(2, 32) || in LLTToBId()
[all …]
H A DAMDGPULegalizerInfo.cpp106 LLT::fixed_vector(Ty.getNumElements() + 1, EltTy)); in oneMoreElement()
136 return std::pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltTy)); in moreEltsToNext32Bit()
158 LLT::fixed_vector(NewNumElts, Ty.getElementType())); in moreElementsToNextExistingRegClass()
171 return LLT::fixed_vector(4, LLT::scalar(32)); in getBufferRsrcRegisterType()
173 return LLT::fixed_vector(NumElems * 4, LLT::scalar(32)); in getBufferRsrcRegisterType()
302 constexpr LLT V2S8 = LLT::fixed_vector(2, 8);
303 constexpr LLT V2S16 = LLT::fixed_vector(2, 16);
304 constexpr LLT V4S16 = LLT::fixed_vector(4, 16);
305 constexpr LLT V6S16 = LLT::fixed_vector(6, 16);
306 constexpr LLT V8S16 = LLT::fixed_vector(8, 16);
[all …]
H A DAMDGPUGlobalISelUtils.cpp111 return LLT::fixed_vector(2, ElTy); in getReadAnyLaneSplitTy()
H A DAMDGPUArgumentUsageInfo.cpp95 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
H A DAMDGPUPreLegalizerCombiner.cpp188 const LLT V2S16 = LLT::fixed_vector(2, 16); in applyClampI64ToI16()
H A DAMDGPURegisterBankInfo.cpp1051 return LLT::fixed_vector(128 / EltTy.getSizeInBits(), EltTy); in widen96To128()
1805 return B.buildMergeLikeInstr(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
2121 LLT MergeTy = LLT::fixed_vector(Ops.size(), EltTy); in foldInsertEltToCmpSelect()
2538 if (DstTy != LLT::scalar(16) && DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2911 LLT Vec32 = LLT::fixed_vector(2 * SrcTy.getNumElements(), 32); in applyMappingImpl()
3026 LLT Vec32 = LLT::fixed_vector(2 * VecTy.getNumElements(), 32); in applyMappingImpl()
4195 if (DstTy == LLT::fixed_vector(2, 16)) { in getInstrMapping()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp46 const LLT v16s64 = LLT::fixed_vector(16, 64); in SPIRVLegalizerInfo()
47 const LLT v16s32 = LLT::fixed_vector(16, 32); in SPIRVLegalizerInfo()
48 const LLT v16s16 = LLT::fixed_vector(16, 16); in SPIRVLegalizerInfo()
49 const LLT v16s8 = LLT::fixed_vector(16, 8); in SPIRVLegalizerInfo()
50 const LLT v16s1 = LLT::fixed_vector(16, 1); in SPIRVLegalizerInfo()
52 const LLT v8s64 = LLT::fixed_vector(8, 64); in SPIRVLegalizerInfo()
53 const LLT v8s32 = LLT::fixed_vector(8, 32); in SPIRVLegalizerInfo()
54 const LLT v8s16 = LLT::fixed_vector(8, 16); in SPIRVLegalizerInfo()
55 const LLT v8s8 = LLT::fixed_vector(8, 8); in SPIRVLegalizerInfo()
56 const LLT v8s1 = LLT::fixed_vector(8, 1); in SPIRVLegalizerInfo()
[all …]
H A DSPIRVBuiltins.cpp1271 LLT::fixed_vector(VecLen, MRI->getType(ElemReg))); in generateGroupInst()
1525 LLT::fixed_vector(3, PointerSize)); in genWorkgroupQuery()
1601 LLT::fixed_vector(Call->ReturnType->getOperand(2).getImm(), BitWidth); in generateBuiltinVar()
1892 LLT::fixed_vector(NumActualRetComponents, Bitwidth)); in generateImageSizeQueryInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1915 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorSHL()
1917 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorSHL()
1919 } else if (Ty == LLT::fixed_vector(2, 32)) { in selectVectorSHL()
1921 } else if (Ty == LLT::fixed_vector(4, 16)) { in selectVectorSHL()
1923 } else if (Ty == LLT::fixed_vector(8, 16)) { in selectVectorSHL()
1925 } else if (Ty == LLT::fixed_vector(16, 8)) { in selectVectorSHL()
1927 } else if (Ty == LLT::fixed_vector(8, 8)) { in selectVectorSHL()
1969 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorAshrLshr()
1972 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorAshrLshr()
1975 } else if (Ty == LLT::fixed_vector(2, 32)) { in selectVectorAshrLshr()
[all …]
H A DAArch64PreLegalizerCombiner.cpp321 MidTy = LLT::fixed_vector(4, 32); in applyExtAddvToUdotAddv()
324 MidTy = LLT::fixed_vector(2, 32); in applyExtAddvToUdotAddv()
344 LLT MainTy = LLT::fixed_vector(16, 8); in applyExtAddvToUdotAddv()
356 Register v8Zeroes = Builder.buildConstant(LLT::fixed_vector(8, 8), 0) in applyExtAddvToUdotAddv()
362 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
367 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
374 extractParts(Ext1SrcReg, LLT::fixed_vector(16, 8), SrcNumElts / 16, in applyExtAddvToUdotAddv()
376 extractParts(Ext2SrcReg, LLT::fixed_vector(16, 8), SrcNumElts / 16, in applyExtAddvToUdotAddv()
387 ZeroesLLT = LLT::fixed_vector(4, 32); in applyExtAddvToUdotAddv()
390 ZeroesLLT = LLT::fixed_vector(2, 32); in applyExtAddvToUdotAddv()
[all …]
H A DAArch64LegalizerInfo.cpp50 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
51 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
52 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
53 const LLT v2s8 = LLT::fixed_vector(2, 8); in AArch64LegalizerInfo()
54 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
55 const LLT v4s16 = LLT::fixed_vector(4, 16); in AArch64LegalizerInfo()
56 const LLT v2s16 = LLT::fixed_vector(2, 16); in AArch64LegalizerInfo()
57 const LLT v2s32 = LLT::fixed_vector(2, 32); in AArch64LegalizerInfo()
58 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo()
59 const LLT v2s64 = LLT::fixed_vector(2, 64); in AArch64LegalizerInfo()
[all …]
H A DAArch64PostLegalizerCombiner.cpp391 if (DstTy != LLT::fixed_vector(2, 64) && DstTy != LLT::fixed_vector(2, 32) && in matchCombineMulCMLT()
392 DstTy != LLT::fixed_vector(4, 32) && DstTy != LLT::fixed_vector(4, 16) && in matchCombineMulCMLT()
393 DstTy != LLT::fixed_vector(8, 16)) in matchCombineMulCMLT()
499 } else if (KB && DstTy == LLT::fixed_vector(2, 64) && in matchExtMulToMULL()
519 } else if (KB && DstTy == LLT::fixed_vector(2, 64) && in matchExtMulToMULL()
H A DAArch64PostLegalizerLowering.cpp1169 return DstTy == LLT::fixed_vector(2, 64); in matchMulv2s64()
1179 assert(DstTy == LLT::fixed_vector(2, 64) && "Expected v2s64 Mul"); in applyMulv2s64()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LegalizerInfo.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCLegalizerInfo.cpp47 const LLT V16S8 = LLT::fixed_vector(16, 8); in PPCLegalizerInfo()
48 const LLT V8S16 = LLT::fixed_vector(8, 16); in PPCLegalizerInfo()
49 const LLT V4S32 = LLT::fixed_vector(4, 32); in PPCLegalizerInfo()
50 const LLT V2S64 = LLT::fixed_vector(2, 64); in PPCLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86LegalizerInfo.cpp60 const LLT v2s32 = LLT::fixed_vector(2, 32); in X86LegalizerInfo()
61 const LLT v4s8 = LLT::fixed_vector(4, 8); in X86LegalizerInfo()
63 const LLT v16s8 = LLT::fixed_vector(16, 8); in X86LegalizerInfo()
64 const LLT v8s16 = LLT::fixed_vector(8, 16); in X86LegalizerInfo()
65 const LLT v4s32 = LLT::fixed_vector(4, 32); in X86LegalizerInfo()
66 const LLT v2s64 = LLT::fixed_vector(2, 64); in X86LegalizerInfo()
67 const LLT v2p0 = LLT::fixed_vector(2, p0); in X86LegalizerInfo()
69 const LLT v32s8 = LLT::fixed_vector(32, 8); in X86LegalizerInfo()
70 const LLT v16s16 = LLT::fixed_vector(16, 16); in X86LegalizerInfo()
71 const LLT v8s32 = LLT::fixed_vector(8, 32); in X86LegalizerInfo()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DLowLevelType.h101 static constexpr LLT fixed_vector(unsigned NumElements, in fixed_vector() function
108 static constexpr LLT fixed_vector(unsigned NumElements, LLT ScalarTy) { in fixed_vector() function
258 return fixed_vector(Factor, *this); in multiplyElements()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp76 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
77 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
78 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo()
79 const LLT v2s64 = LLT::fixed_vector(2, 64); in MipsLegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizeMutations.cpp104 TypeIdx, LLT::fixed_vector(NewNumElements, VecTy.getElementType())); in moreElementsToNextPow2()
H A DLegacyLegalizerInfo.cpp347 IntermediateType = LLT::fixed_vector(Aspect.Type.getNumElements(), in findVectorLegalAction()
361 LLT::fixed_vector(NumElementsAndAction.first, in findVectorLegalAction()
H A DUtils.cpp543 LeftoverTy = LLT::fixed_vector(LeftoverNumElts, RegTy.getElementType()); in extractParts()
611 LLT NarrowTy = (NumElts == 1) ? EltTy : LLT::fixed_vector(NumElts, EltTy); in extractVectorParts()
638 LLT LeftoverTy = LLT::fixed_vector(LeftoverNumElts, EltTy); in extractVectorParts()
H A DLegalizerHelper.cpp3571 DstCastTy = LLT::fixed_vector(NumDstElt / NumSrcElt, DstEltTy); in lowerBitcast()
3583 SrcPartTy = LLT::fixed_vector(NumSrcElt / NumDstElt, SrcEltTy); in lowerBitcast()
4144 LLT MoreTy = LLT::fixed_vector(NextPowerOf2(DstTy.getNumElements()), in lowerLoad()
4911 LLT NarrowTy = (NumElts == 1) ? EltTy : LLT::fixed_vector(NumElts, EltTy); in makeDstOps()
5577 LLT SrcNarrowTy = LLT::fixed_vector(NewElemCount, SrcTy.getElementType()); in fewerElementsBitcast()
6304 SrcExtTy = LLT::fixed_vector( in moreElementsVector()
6308 DstExtTy = LLT::fixed_vector( in moreElementsVector()
6326 LLT CondTy = LLT::fixed_vector( in moreElementsVector()
6419 LLT PaddedTy = LLT::fixed_vector(PaddedMaskNumElts, DestEltTy); in equalizeVectorShuffleLengths()
9123 {LLT::fixed_vector(VSize / 8, 8), in lowerBitreverse()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1051 LLT NewTy = LLT::fixed_vector(NumElts, LLT::scalar(MinSize)); in widenVectorEltsToVectorMinSize()
1233 TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType())); in clampMinNumElements()
1252 TypeIdx, LLT::fixed_vector(NewSize, VecTy.getElementType())); in alignNumElementsTo()

12