Home
last modified time | relevance | path

Searched refs:emitRRR (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2826 TOut.emitRRR(ABI.GetPtrAdduOp(), DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2842 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2853 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2861 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2884 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2921 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
3019 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, DstReg, GPReg, in loadAndAddSymbolAddress()
3064 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, TmpReg, TmpReg, GPReg, in loadAndAddSymbolAddress()
3076 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, TmpReg, SrcReg, in loadAndAddSymbolAddress()
3141 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, TmpReg, SrcReg, in loadAndAddSymbolAddress()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp226 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR() function in MipsTargetStreamer
269 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(), in emitAddu()
342 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI); in emitStoreWithImmOffset()
378 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI); in emitLoadWithImmOffset()
1250 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI); in emitDirectiveCpsetup()
1272 emitRRR(Mips::ADDu, GPReg, GPReg, RegNo, SMLoc(), &STI); in emitDirectiveCpsetup()
1274 emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI); in emitDirectiveCpsetup()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetStreamer.h133 void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2,