| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVBuiltins.cpp | 636 MIB.addDef(Call->ReturnRegister).addUse(TypeReg); 639 MIB.addUse(Call->Arguments[i]); 654 .addUse(Call->Arguments[0]) in buildAtomicInitInst() 655 .addUse(Call->Arguments[1]); in buildAtomicInitInst() 688 .addUse(TypeReg) in buildAtomicLoadInst() 689 .addUse(PtrRegister) in buildAtomicLoadInst() 690 .addUse(ScopeRegister) in buildAtomicLoadInst() 691 .addUse(MemSemanticsReg); in buildAtomicLoadInst() 710 .addUse(PtrRegister) in buildAtomicStoreInst() 711 .addUse(ScopeRegister) in buildAtomicStoreInst() [all …]
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| H A D | SPIRVInstructionSelector.cpp | 590 .addUse(SrcReg) in BuildCOPY() 628 .addUse(GR.getSPIRVTypeID(ResType)) in spvSelect() 629 .addUse(I.getOperand(1).getReg()) in spvSelect() 630 .addUse(I.getOperand(2).getReg()); in spvSelect() 867 .addUse(ResTypeReg) in spvSelect() 868 .addUse(GV); in spvSelect() 875 .addUse(ResTypeReg) in spvSelect() 876 .addUse(NewVReg) in spvSelect() 877 .addUse(I.getOperand(2).getReg()) in spvSelect() 882 .addUse(GR.getSPIRVTypeID(ResType)) in spvSelect() [all …]
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| H A D | SPIRVGlobalRegistry.cpp | 278 .addUse(getSPIRVTypeID(ElemType)) in getOpTypeVector() 315 .addUse(getSPIRVTypeID(SpvType)); in createConstFP() 319 .addUse(getSPIRVTypeID(SpvType)); in createConstFP() 368 .addUse(getSPIRVTypeID(SpvType)); in createConstInt() 372 .addUse(getSPIRVTypeID(SpvType)); in createConstInt() 377 .addUse(getSPIRVTypeID(SpvType)); in createConstInt() 418 .addUse(SpvTypeReg); in buildConstantInt() 423 .addUse(SpvTypeReg); in buildConstantInt() 458 .addUse(getSPIRVTypeID(SpvType)); in buildConstantFP() 512 .addUse(getSPIRVTypeID(SpvType)); in getOrCreateCompositeOrNull() [all …]
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| H A D | SPIRVUtils.cpp | 116 auto MIB = MIRBuilder.buildInstr(SPIRV::OpName).addUse(Target); in buildOpName() 126 .addUse(Target); in buildOpName() 144 .addUse(Reg) in buildOpDecorate() 154 .addUse(Reg) in buildOpDecorate() 164 .addUse(Reg) in buildOpMemberDecorate() 177 .addUse(Reg) in buildOpMemberDecorate() 197 .addUse(Reg) in buildOpSpirvDecorations() 876 MIRBuilder.buildInstr(Opcode).addDef(ReturnRegister).addUse(TypeID); in createContinuedInstructions() 879 MIB.addUse(Args[I]); in createContinuedInstructions() 887 MIB.addUse(Args[J]); in createContinuedInstructions()
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| H A D | SPIRVPreLegalizer.cpp | 186 MIB.buildInstr(TargetOpcode::COPY).addDef(ResVReg).addUse(OpReg); in buildOpBitcast() 190 .addUse(GR->getSPIRVTypeID(ResType)) in buildOpBitcast() 191 .addUse(OpReg); in buildOpBitcast() 459 .addUse(NewReg) in insertAssignInstr() 460 .addUse(GR->getSPIRVTypeID(SpvType)) in insertAssignInstr() 769 .addUse(GR->getSPIRVTypeID(RetType)) in insertInlineAsmProcess() 770 .addUse(GR->getSPIRVTypeID(FuncType)) in insertInlineAsmProcess() 771 .addUse(AsmTargetReg); in insertInlineAsmProcess() 785 .addUse(AsmReg) in insertInlineAsmProcess() 800 .addUse(GR->getSPIRVTypeID(RetType)) in insertInlineAsmProcess() [all …]
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| H A D | SPIRVCallLowering.cpp | 59 .addUse(VRegs[0]) in lowerReturn() 444 .addUse(GR->getSPIRVTypeID(RetTy)) in lowerFormalArguments() 446 .addUse(GR->getSPIRVTypeID(FuncTy)); in lowerFormalArguments() 461 .addUse(GR->getSPIRVTypeID(ArgTypeVRegs[i])); in lowerFormalArguments() 480 .addUse(FuncVReg); in lowerFormalArguments() 718 .addUse(GR->getSPIRVTypeID(RetType)) in lowerCall() 725 MIB.addUse(Arg.Regs[0]); in lowerCall()
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| H A D | SPIRVPreLegalizerCombiner.cpp | 93 .addUse(SubOperand1) // Operand X in applySPIRVDistance() 94 .addUse(SubOperand2); // Operand Y in applySPIRVDistance()
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| H A D | SPIRVEmitNonSemanticDI.cpp | 198 .addUse(GR->getSPIRVTypeID(VoidTy)) in emitGlobalDI() 203 MIB.addUse(Reg); in emitGlobalDI()
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| H A D | SPIRVISelLowering.cpp | 153 .addUse(GR.getSPIRVTypeID(NewPtrType)) in doInsertBitcast() 154 .addUse(OpReg) in doInsertBitcast() 622 .addUse(OldTypeReg) in insertLogicalCopyOnResult() 623 .addUse(NewResultReg) in insertLogicalCopyOnResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 280 .addUse(TiedDest) in buildUnalignedLoad() 335 .addUse(PseudoMULTuReg); in select() 370 .addUse(I.getOperand(2).getReg()) in select() 378 .addUse(I.getOperand(0).getReg()) in select() 379 .addUse(JTIndex); in select() 387 .addUse(DestAddress) in select() 399 .addUse(DestTmp) in select() 400 .addUse(MF.getInfo<MipsFunctionInfo>() in select() 408 .addUse(Dest); in select() 523 .addUse(HILOReg); in select() [all …]
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| H A D | MipsISelLowering.cpp | 4972 .addUse(Address) in emitLDR_W() 4974 BuildMI(*BB, I, DL, TII->get(Mips::FILL_W)).addDef(Dest).addUse(Temp); in emitLDR_W() 4984 .addUse(Address) in emitLDR_W() 4986 .addUse(Undef); in emitLDR_W() 4989 .addUse(Address) in emitLDR_W() 4991 .addUse(LoadHalf); in emitLDR_W() 4992 BuildMI(*BB, I, DL, TII->get(Mips::FILL_W)).addDef(Dest).addUse(LoadFull); in emitLDR_W() 5019 .addUse(Address) in emitLDR_D() 5021 BuildMI(*BB, I, DL, TII->get(Mips::FILL_D)).addDef(Dest).addUse(Temp); in emitLDR_D() 5028 .addUse(Address) in emitLDR_D() [all …]
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| H A D | MipsSEISelDAGToDAG.cpp | 130 .addUse(Mips::RA_64, RegState::Undef) in emitMCountABI() 131 .addUse(Mips::ZERO_64); in emitMCountABI() 133 MIB.addUse(Mips::AT_64, RegState::Implicit); in emitMCountABI() 138 .addUse(Mips::RA, RegState::Undef) in emitMCountABI() 139 .addUse(Mips::ZERO); in emitMCountABI() 143 .addUse(Mips::SP) in emitMCountABI() 146 MIB.addUse(Mips::AT, RegState::Implicit); in emitMCountABI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SpeculationHardening.cpp | 228 .addUse(MisspeculatingTaintReg) in insertTrackingCode() 229 .addUse(AArch64::XZR) in insertTrackingCode() 368 .addUse(AArch64::SP) in insertSPToRegTaintPropagation() 374 .addUse(AArch64::XZR) in insertSPToRegTaintPropagation() 375 .addUse(AArch64::XZR) in insertSPToRegTaintPropagation() 391 .addUse(AArch64::SP) in insertRegToSPTaintPropagation() 397 .addUse(TmpReg, RegState::Kill | RegState::Renamable) in insertRegToSPTaintPropagation() 398 .addUse(MisspeculatingTaintReg, RegState::Kill) in insertRegToSPTaintPropagation() 403 .addUse(TmpReg, RegState::Kill) in insertRegToSPTaintPropagation() 451 .addUse(Reg); in makeGPRSpeculationSafe() [all …]
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| H A D | AArch64ExpandPseudoInsts.cpp | 381 .addUse(AArch64::WZR) in expandCMP_SWAP_128() 382 .addUse(AArch64::WZR) in expandCMP_SWAP_128() 389 .addUse(StatusReg, RegState::Kill) in expandCMP_SWAP_128() 390 .addUse(StatusReg, RegState::Kill) in expandCMP_SWAP_128() 393 .addUse(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128() 929 .addUse(CtxReg) in expandStoreSwiftAsyncContext() 930 .addUse(BaseReg) in expandStoreSwiftAsyncContext() 946 .addUse(BaseReg) in expandStoreSwiftAsyncContext() 951 .addUse(AArch64::X16) in expandStoreSwiftAsyncContext() 958 .addUse(AArch64::XZR) in expandStoreSwiftAsyncContext() [all …]
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| H A D | AArch64LowerHomogeneousPrologEpilog.cpp | 344 .addUse(AArch64::SP) in getOrCreateFrameHelper() 360 .addUse(AArch64::LR) in getOrCreateFrameHelper() 606 .addUse(AArch64::SP) in lowerProlog()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2553 .addUse(Hi) in extractF64Exponent() 2554 .addUse(Const0.getReg(0)) in extractF64Exponent() 2555 .addUse(Const1.getReg(0)); in extractF64Exponent() 2644 .addUse(Unmerge.getReg(1)); in legalizeITOFP() 2885 .addUse(MulVal.getReg(0)) in legalizeSinCos() 2894 .addUse(TrigVal) in legalizeSinCos() 3270 .addUse(PtrReg) in legalizeAtomicCmpXChg() 3271 .addUse(PackedVal) in legalizeAtomicCmpXChg() 3361 .addUse(Ext.getReg(0)) in legalizeFlog2() 3373 .addUse(Src) in legalizeFlog2() [all …]
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| H A D | AMDGPUPostLegalizerCombiner.cpp | 279 .addUse(SqrtSrcMI->getOperand(0).getReg()) in matchRcpSqrtToRsq() 289 .addUse(RcpSrcMI->getOperand(0).getReg()) in matchRcpSqrtToRsq() 310 .addUse(X) in applyFDivSqrtToRsqF16()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ArgumentStackSlotRebase.cpp | 163 .addUse(X86::NoRegister) in runOnMachineFunction() 165 .addUse(X86::NoRegister) in runOnMachineFunction()
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| H A D | X86FrameLowering.cpp | 1635 .addUse(StackPtr) in emitPrologue() 1637 .addUse(X86::NoRegister) in emitPrologue() 1639 .addUse(X86::NoRegister) in emitPrologue() 1676 .addUse(MachineFramePtr) in emitPrologue() 1677 .addUse(X86::RIP) in emitPrologue() 1679 .addUse(X86::NoRegister) in emitPrologue() 1682 .addUse(X86::NoRegister); in emitPrologue() 1692 .addUse(MachineFramePtr) in emitPrologue() 1863 .addUse(X86::RSP) in emitPrologue() 1865 .addUse(X86::NoRegister) in emitPrologue() [all …]
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| H A D | X86CallLowering.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 583 .addUse(LHSReg) in insertComparison() 584 .addUse(RHSReg) in insertComparison() 602 .addUse(PrevRes) in insertComparison() 780 .addUse(CondReg) in selectSelect() 796 .addUse(TrueReg) in selectSelect() 797 .addUse(FalseReg) in selectSelect() 899 .addUse(AndResult) in select() 949 .addUse(SrcReg) in select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 723 RegSequence.addUse(Regs[I]); in createTuple() 1073 .addUse(SrcReg) in selectCopy() 1938 Shl.addUse(Src2Reg); in selectVectorSHL() 2050 .addUse(Top) in selectVaStartAAPCS() 2051 .addUse(VAList) in selectVaStartAAPCS() 2085 .addUse(Temp) in selectVaStartAAPCS() 2086 .addUse(VAList) in selectVaStartAAPCS() 2132 .addUse(ArgsAddrReg) in selectVaStartDarwin() 2133 .addUse(ListReg) in selectVaStartDarwin() 2160 auto MovI = MIB.buildInstr(AArch64::MOVKXi).addDef(DstReg).addUse(SrcReg); in materializeLargeCMVal() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVLandingPadSetup.cpp | 75 MachineInstrBuilder(MF, &MI).addUse(RISCV::X7, RegState::ImplicitKill); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 793 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu).addUse(VMZu); in expandPseudoLogM() 794 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl).addUse(VMZl); in expandPseudoLogM() 798 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu); in expandPseudoLogM() 799 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl); in expandPseudoLogM()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86LegalizerInfo.cpp | 648 .addUse(SlotPointer.getReg(0)) in legalizeSITOFP() 670 .addUse(Src) in legalizeFPTOSI() 671 .addUse(SlotPointer.getReg(0)) in legalizeFPTOSI() 831 .addUse(StackPtr) in legalizeGETROUNDING()
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