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Searched refs:_D (Results 1 – 21 of 21) sorted by relevance

/freebsd/share/mk/
H A Dbsd.dep.mk161 .for _D in ${_DSRC:R}
162 SRCS+= ${_D}.h
163 ${_D}.h: ${_DSRC}
166 OBJS+= ${_D}.o
167 CLEANFILES+= ${_D}.h ${_D}.o
168 ${_D}.o: ${_DSRC} ${OBJS:S/^${_D}.o$//}
172 CLEANFILES+= ${_D}.pico ${_D}.pieo ${_D}.po ${_D}.nossppico
173 ${_D}.pico: ${_DSRC} ${SOBJS:S/^${_D}.pico$//}
176 ${_D}.pieo: ${_DSRC} ${OBJS:S/^${_D}.pieo$//}
179 ${_D}.po: ${_DSRC} ${POBJS:S/^${_D}.po$//}
[all …]
/freebsd/sys/contrib/ncsw/inc/
H A Dctype_ext.h45 #define _D 0x04 /* digit */ macro
56 #define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0)
59 #define isdigit(c) ((__ismask(c)&(_D)) != 0)
60 #define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0)
62 #define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0)
66 #define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0)
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DSVEInstrFormats.td385 def _D : sve_int_ptrue<0b11, opc, asm, PPR64, nxv2i1, op>;
394 (!cast<Instruction>(NAME # _D) PPR64:$Pd, 0b11111), 1>;
832 def _D : sve_int_pfirst_next<0b11, opc, asm, PPR64>;
837 def : SVE_2_Op_Pat<nxv2i1, op, nxv2i1, nxv2i1, !cast<Instruction>(NAME # _D)>;
874 def _D : sve_int_count_r<0b11, opc, asm, GPR64z, PPR64, GPR64as32>;
892 …(EXTRACT_SUBREG (!cast<Instruction>(NAME # _D) PPRAny:$Pg, (INSERT_SUBREG (IMPLICIT_DEF), $Rn, sub…
894 … (!cast<Instruction>(NAME # _D) PPRAny:$Pg, (INSERT_SUBREG (IMPLICIT_DEF), $Rn, sub_32))>;
902 def _D : sve_int_count_r<0b11, opc, asm, GPR32z, PPR64, GPR32z>;
911 (!cast<Instruction>(NAME # _D) PPRAny:$Pg, $Rn)>;
920 def _D : sve_int_count_r<0b11, opc, asm, GPR64z, PPR64, GPR64z>;
[all …]
H A DSMEInstrFormats.td557 defm : sme_mem_ss_aliases_base<mnemonic # "d", !cast<Instruction>(inst # _D),
619 def _D : sme_mem_ld_ss_inst<0b0, 0b11, mnemonic # "d",
757 def _D : sme_mem_st_ss_inst<0b0, 0b11, mnemonic # "d",
789 defm : sme_mem_st_ss_patterns<!cast<Instruction>(NAME # _D),
954 def _D : sme_vector_to_tile_inst<0b0, 0b11, !if(is_col, TileVectorOpV64,
957 SMEPseudo2Instr<NAME # _D, 1> {
977 def _PSEUDO_D : sme_mova_insert_pseudo<SMEMatrixTileD>, SMEPseudo2Instr<NAME # _D, 0>;
992 defm : sme_vector_to_tile_aliases<!cast<Instruction>(NAME # _D),
1137 def _D : sme_tile_to_vector_inst<0b0, 0b11, ZPR64, !if(is_col, TileVectorOpV64,
1161 defm : sme_tile_to_vector_aliases<!cast<Instruction>(NAME # _D), ZPR64,
[all …]
H A DAArch64SchedA510.td804 def : InstRW<[CortexA510MCWrite<26, 23, CortexA510UnitVMC>], (instregex "^[SU]DIVR?_(ZPmZ|ZPZZ)_D")…
813 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^[SU]DOT_ZZZI?_D")>;
858 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^INDEX_(IR|RI|RR)_D")>;
889 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ|ZPZZ)_D",
890 "^[SU]MULH_(ZPmZ|ZZZ|ZPZZ)_D")>;
901 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^ML[AS]_(ZZZI|ZPZZZ)_D",
932 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^SQRDML[AS]H_ZZZI?_D",
940 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^SQRDMULH_ZZZI?_D")>;
1052 def : InstRW<[CortexA510Write<4, CortexA510UnitVMAC>], (instregex "^FLOGB_(ZPmZ|ZPZZ)_D")>;
1075 def : InstRW<[CortexA510MCWrite<22, 19, CortexA510UnitVMC>], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
[all …]
H A DAArch64SchedNeoverseN2.td1732 def : InstRW<[N2Write_4cyc_1V0], (instregex "^[SU]DOT_ZZZI?_D$")>;
1777 def : InstRW<[N2Write_8cyc_2M0_2V0], (instregex "^INDEX_(IR|RI|RR)_D$")>;
1809 def : InstRW<[N2Write_5cyc_2V0], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ)_D",
1811 "^[SU]MULH_(ZPmZ|ZZZ)_D",
1824 "^(ML[AS]|MAD|MSB)_(ZPmZZ|ZPZZZ)_D")>;
1854 def : InstRW<[N2Write_5cyc_2V0], (instregex "^SQRDML[AS]H_ZZZI?_D$",
1862 def : InstRW<[N2Write_5cyc_2V0], (instregex "^SQRDMULH_ZZZI?_D$")>;
1973 def : InstRW<[N2Write_3cyc_1V0], (instregex "^FLOGB_(ZPmZ|ZPZZ)_D")>;
1996 def : InstRW<[N2Write_15cyc_1V0], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
2171 "^GLD(FF)?1S?[BHW]_D(_SCALED)?$",
[all …]
H A DAArch64SchedNeoverseV1.td1449 def : InstRW<[V1Write_4c_1V0], (instregex "^[SU]DOT_ZZZI?_D$")>;
1484 def : InstRW<[V1Write_8c_2M0_2V0], (instregex "^INDEX_(IR|RI|RR)_D$")>;
1501 def : InstRW<[V1Write_5c_2V0], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ)_D",
1503 "^[SU]MULH_(ZPmZ|ZZZ)_D",
1505 "^(MLA|MLS|MAD|MSB)_(ZPmZZ|ZPZZZ)_D")>;
1613 def : InstRW<[V1Write_15c7_1V0], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
1770 "^GLD(FF)?1S?[BHW]_D(_[SU]XTW)?(_SCALED)?$",
1856 "^SST1[BHW]_D$",
H A DAArch64SchedNeoverseV2.td2243 def : InstRW<[V2Wr_ZDOTH, V2Rd_ZDOTH], (instregex "^[SU]DOT_ZZZI?_D")>;
2288 def : InstRW<[V2Write_8cyc_2M0_2V02], (instregex "^INDEX_(IR|RI|RR)_D")>;
2322 def : InstRW<[V2Write_5cyc_2V02], (instregex "^MUL_(ZI|ZPmZ|ZZZI|ZZZ)_D",
2324 "^[SU]MULH_(ZPmZ|ZZZ)_D",
2372 def : InstRW<[V2Wr_ZMASQD, V2Rd_ZMASQ], (instregex "^SQRDML[AS]H_ZZZI?_D",
2380 def : InstRW<[V2Write_5cyc_2V02], (instregex "^SQRDMULH_ZZZI?_D")>;
2490 def : InstRW<[V2Write_3cyc_1V02], (instregex "^FLOGB_(ZPmZ|ZPZZ)_D")>;
2513 def : InstRW<[V2Write_15cyc_1V02_14rc], (instregex "^FDIVR?_(ZPmZ|ZPZZ)_D")>;
2704 (instregex "^GLD(FF)?1S?[BHW]_D(_[SU]XTW)?$",
2789 def : InstRW<[V2Write_2cyc_2L01_2V01], (instregex "^SST1[BHW]_D$",
H A DAArch64SchedA64FX.td2272 def : InstRW<[A64FXWrite_FDIVD], (instregex "^F(DIVR?|SQRT)_Z.*_D")>;
2366 "^GLD(FF)?1S?[BHW]_D$")>;
2465 def : InstRW<[A64FXWrite_SDIV_D], (instregex "^[SU]DIVR?.*_D")>;
2510 (instregex "^SST1[BHW]_D(_[^I]|$)", "^SST1D(_[^I]|$)")>;
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormatsF1.td84 def _D : F_MOV<1, sop, op, "d", sFPR64Op>;
90 def _D : F_XZ<1, sop, op, "d", opnode, sFPR64Op>;
113 def _D : F_XYZ<1, sop, op, "d", opnode, sFPR64Op>;
126 def _D : F_ACCUM_XYZ<1, sop, op, "d", opnode, sFPR64Op>;
132 def _D : F_CMPXY<1, sop, op, "d", sFPR64Op>;
139 def _D : F_CMPZX<1, sop, op, "d", sFPR64Op>;
235 def _D : F_XYAI_LD<sop, 1, op, "d", sFPR64Op, uimm8_2>;
241 def _D : F_XYAR_LD<sop, 1, op, "d", sFPR64Op>;
247 def _D : F_XYAI_ST<sop, 1, op, "d", sFPR64Op, uimm8_2>;
253 def _D : F_XYAR_ST<sop, 1, op, "d", sFPR64Op>;
[all …]
H A DCSKYInstrFormatsF2.td39 def _D : F2_XYZ<0b00001, sop, op#".64"#"\t$vrz, $vrx, $vry",
50 def _D : F2_XYZ<0b00001, sop, op#".64"#"\t$vrz, $vrx, $vry",
81 def _D : F2_XZ<0b00001, FPR64Op, sop, op#".64", opnode>;
87 def _D : F2_XZ_SET<0b00001, FPR64Op, sop, op#".64"#suffix>;
100 def _D : F2_CXY<0b00001, FPR64Op, sop, op#".64">;
113 def _D : F2_CX<0b00001, FPR64Op, sop, op#".64">;
190 def _D : F2_CXYZ<0b00001, FPR64Op, sop, op#".64">;
H A DCSKYInstrInfoF2.td306 (Br0 (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2), bb:$imm16)>;
309 (Br1 (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2), bb:$imm16)>;
316 (MV (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2))>;
330 (f2FSEL_D (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2), FPR64Op:$rx, FPR64Op:$false),
331 (f2FSEL_D (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2), FPR64Op:$false, FPR64Op:$rx)
345 (Br0 (!cast<Instruction>(Instr#_D) FPR64Op:$rs2, FPR64Op:$rs1), bb:$imm16)>;
348 (Br1 (!cast<Instruction>(Instr#_D) FPR64Op:$rs2, FPR64Op:$rs1), bb:$imm16)>;
355 (MV (!cast<Instruction>(Instr#_D) FPR64Op:$rs2, FPR64Op:$rs1))>;
369 (f2FSEL_D (!cast<Instruction>(Instr#_D) FPR64Op:$rs2, FPR64Op:$rs1), FPR64Op:$rx, FPR64Op:$false),
370 (f2FSEL_D (!cast<Instruction>(Instr#_D) FPR64O
[all...]
H A DCSKYInstrInfoF1.td320 (Br0 (!cast<Instruction>(Instr#_D) sFPR64Op:$rs1, sFPR64Op:$rs2), bb:$imm16)>;
323 (Br1 (!cast<Instruction>(Instr#_D) sFPR64Op:$rs1, sFPR64Op:$rs2), bb:$imm16)>;
330 (MV (!cast<Instruction>(Instr#_D) sFPR64Op:$rs1, sFPR64Op:$rs2))>;
342 (Br0 (!cast<Instruction>(Instr#_D) sFPR64Op:$rs2, sFPR64Op:$rs1), bb:$imm16)>;
345 (Br1 (!cast<Instruction>(Instr#_D) sFPR64Op:$rs2, sFPR64Op:$rs1), bb:$imm16)>;
352 (MV (!cast<Instruction>(Instr#_D) sFPR64Op:$rs2, sFPR64Op:$rs1))>;
/freebsd/contrib/llvm-project/llvm/tools/bugpoint/
H A Dbugpoint.cpp84 AddToDriver(BugDriver &_D) : FunctionPassManager(nullptr), D(_D) {} in AddToDriver() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLASXInstrInfo.td1098 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>;
1105 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>;
1116 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;
1123 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;
1145 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>;
1171 (!cast<LAInst>(Inst#"_D") LASX256:$xd, LASX256:$xj, LASX256:$xk)>;
1186 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;
1197 (!cast<LAInst>(Inst#"_D") LASX256:$xj, uimm6:$imm)>;
1212 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>;
1238 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>;
[all …]
H A DLoongArchLSXInstrInfo.td1224 (!cast<LAInst>(Inst#"_D") LSX128:$vj)>;
1231 (!cast<LAInst>(Inst#"_D") LSX128:$vj)>;
1242 (!cast<LAInst>(Inst#"_D") LSX128:$vj, LSX128:$vk)>;
1249 (!cast<LAInst>(Inst#"_D") LSX128:$vj, LSX128:$vk)>;
1271 (!cast<LAInst>(Inst#"_D") LSX128:$vj, simm5:$imm)>;
1293 (!cast<LAInst>(Inst#"_D") LSX128:$vd, LSX128:$vj, LSX128:$vk)>;
1308 (!cast<LAInst>(Inst#"_D") LSX128:$vj, LSX128:$vk)>;
1319 (!cast<LAInst>(Inst#"_D") LSX128:$vj, uimm6:$imm)>;
1334 (!cast<LAInst>(Inst#"_D") LSX128:$vj, simm5:$imm)>;
1360 (!cast<LAInst>(Inst#"_D") LSX128:$vj, LSX128:$vk)>;
[all …]
/freebsd/
H A DMakefile.inc1519 . for _D in ${PATH:S,:, ,g}
520 . if exists(${_D}/svnversion)
521 SVNVERSION_CMD?=${_D}/svnversion
523 . if exists(${_D}/svnliteversion)
524 SVNVERSION_CMD?=${_D}/svnliteversion
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td241 def F#Index#_D : RISCVReg64<!cast<RISCVReg32>("F"#Index#"_F")>,
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_sme.td814 …def NAME # _D : SInst<"svreadz_za64_{d}_vg1x" # vg_num, vg_num # "m", "lUld", MergeNone, "aarch64_…
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td3840 (v2i64 (!cast<MSAInst>(Insn#_D) v2i64:$ws, v2i64:$wt))>;
3849 (v2i64 (!cast<MSAInst>(Insn#_D) v2i64:$ws, v2i64:$wt))>;
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td707 defm AMDGPUSample : AMDGPUSampleHelper_Clamp<"_D", "_d", []>;