Searched refs:XtensaTargetMachine (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaTargetMachine.cpp | 30 RegisterTargetMachine<XtensaTargetMachine> A(getTheXtensaTarget()); in LLVMInitializeXtensaTarget()
49 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, in XtensaTargetMachine() function in XtensaTargetMachine
64 XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT, in XtensaTargetMachine() function in XtensaTargetMachine
70 : XtensaTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in XtensaTargetMachine()
73 XtensaTargetMachine::getSubtargetImpl(const Function &F) const { in getSubtargetImpl()
91 MachineFunctionInfo *XtensaTargetMachine::createMachineFunctionInfo( in createMachineFunctionInfo()
102 XtensaPassConfig(XtensaTargetMachine &TM, PassManagerBase &PM) in XtensaPassConfig()
105 XtensaTargetMachine &getXtensaTargetMachine() const { in getXtensaTargetMachine()
106 return getTM<XtensaTargetMachine>(); in getXtensaTargetMachine()
121 TargetPassConfig *XtensaTargetMachine::createPassConfig(PassManagerBase &PM) { in createPassConfig()
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| H A D | XtensaTargetMachine.h | 25 class XtensaTargetMachine : public CodeGenTargetMachineImpl {
28 XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
34 XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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| H A D | Xtensa.h | 24 class XtensaTargetMachine; variable
26 FunctionPass *createXtensaISelDag(XtensaTargetMachine &TM,
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| H A D | XtensaISelDAGToDAG.cpp | 33 explicit XtensaDAGToDAGISel(XtensaTargetMachine &TM, CodeGenOptLevel OptLevel) in XtensaDAGToDAGISel()
119 XtensaDAGToDAGISelLegacy(XtensaTargetMachine &TM, CodeGenOptLevel OptLevel) in XtensaDAGToDAGISelLegacy()
131 FunctionPass *llvm::createXtensaISelDag(XtensaTargetMachine &TM, in createXtensaISelDag()
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| H A D | XtensaFrameLowering.h | 15 class XtensaTargetMachine; variable
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| H A D | XtensaInstrInfo.h | 29 class XtensaTargetMachine; variable
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