Searched refs:XUSB_PADCTL_IOPHY_PLL_P0_CTL2 (Results 1 – 1 of 1) sorted by relevance
92 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044 macro418 reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL2); in pcie_powerup()422 WR4(sc, XUSB_PADCTL_IOPHY_PLL_P0_CTL2, reg); in pcie_powerup()