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Searched refs:WideVT (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp6092 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), LdVT); in WidenVecRes_LOAD() local
6094 WideVT.getVectorElementCount()); in WidenVecRes_LOAD()
6096 TLI.isOperationLegalOrCustom(ISD::VP_LOAD, WideVT) && in WidenVecRes_LOAD()
6103 DAG.getLoadVP(LD->getAddressingMode(), ISD::NON_EXTLOAD, WideVT, DL, in WidenVecRes_LOAD()
6271 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_MGATHER() local
6276 unsigned NumElts = WideVT.getVectorNumElements(); in WidenVecRes_MGATHER()
6282 WideVT.getVectorNumElements()); in WidenVecRes_MGATHER()
6297 SDValue Res = DAG.getMaskedGather(DAG.getVTList(WideVT, MVT::Other), in WidenVecRes_MGATHER()
6308 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_VP_GATHER() local
6311 ElementCount WideEC = WideVT.getVectorElementCount(); in WidenVecRes_VP_GATHER()
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H A DTargetLowering.cpp6619 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), Size * 2); in BuildSDIV() local
6621 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in BuildSDIV()
6628 isOperationLegalOrCustom(ISD::MUL, WideVT)) { in BuildSDIV()
6629 X = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, X); in BuildSDIV()
6630 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, Y); in BuildSDIV()
6631 Y = DAG.getNode(ISD::MUL, dl, WideVT, X, Y); in BuildSDIV()
6632 Y = DAG.getNode(ISD::SRL, dl, WideVT, Y, in BuildSDIV()
6633 DAG.getShiftAmountConstant(EltBits, WideVT, dl)); in BuildSDIV()
6808 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), Size * 2); in BuildUDIV() local
6810 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in BuildUDIV()
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H A DDAGCombiner.cpp9383 EVT WideVT = EVT::getIntegerVT(Context, WideNumBits); in mergeTruncStores() local
9384 if (WideVT != MVT::i16 && WideVT != MVT::i32 && WideVT != MVT::i64) in mergeTruncStores()
9438 if (SourceValue.getScalarValueSizeInBits() < WideVT.getScalarSizeInBits()) in mergeTruncStores()
9468 bool Allowed = TLI.allowsMemoryAccess(Context, Layout, WideVT, in mergeTruncStores()
9502 if (WideVT != SourceValue.getValueType()) { in mergeTruncStores()
9505 SourceValue = DAG.getNode(ISD::TRUNCATE, DL, WideVT, SourceValue); in mergeTruncStores()
9512 SourceValue = DAG.getNode(ISD::BSWAP, DL, WideVT, SourceValue); in mergeTruncStores()
9515 SDValue RotAmt = DAG.getConstant(WideNumBits / 2, DL, WideVT); in mergeTruncStores()
9516 SourceValue = DAG.getNode(ISD::ROTR, DL, WideVT, SourceValue, RotAmt); in mergeTruncStores()
10698 EVT WideVT = LeftOp.getValueType(); in combineShiftToMULH() local
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H A DLegalizeIntegerTypes.cpp1247 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX() local
1249 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in earlyExpandDIVFIX()
1251 LHS = DAG.getExtOrTrunc(Signed, LHS, dl, WideVT); in earlyExpandDIVFIX()
1252 RHS = DAG.getExtOrTrunc(Signed, RHS, dl, WideVT); in earlyExpandDIVFIX()
H A DSelectionDAG.cpp13269 EVT WideVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(), in WidenVector() local
13271 return getInsertSubvector(DL, getUNDEF(WideVT), N, 0); in WidenVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp5053 EVT WideVT = MVT::i32; in getCSAddressAndShifts() local
5063 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in getCSAddressAndShifts()
5067 NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT, in getCSAddressAndShifts()
5068 DAG.getConstant(0, DL, WideVT), BitShift); in getCSAddressAndShifts()
5081 EVT WideVT = MVT::i32; in lowerATOMIC_LOAD_OP() local
5082 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP()
5109 Src2 = DAG.getNode(ISD::SHL, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP()
5110 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
5113 Src2 = DAG.getNode(ISD::OR, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP()
5114 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp12961 MVT WideVT = WideVec.getSimpleValueType(); in lowerShuffleOfExtractsAsVperm() local
12962 if (!WideVT.is256BitVector()) in lowerShuffleOfExtractsAsVperm()
12987 SDValue Shuf = DAG.getVectorShuffle(WideVT, DL, WideVec, DAG.getUNDEF(WideVT), in lowerShuffleOfExtractsAsVperm()
18004 MVT WideVT = Res.getSimpleValueType(); in lower1BitShuffle() local
18006 if (Opcode == X86ISD::KSHIFTR && WideVT != VT) { in lower1BitShuffle()
18007 int WideElts = WideVT.getVectorNumElements(); in lower1BitShuffle()
18010 DAG.getNode(X86ISD::KSHIFTL, DL, WideVT, Res, in lower1BitShuffle()
18016 Res = DAG.getNode(Opcode, DL, WideVT, Res, in lower1BitShuffle()
19932 MVT WideVT = VT == MVT::v4f32 ? MVT::v8f32 : MVT::v8f64; in lowerINT_TO_FP_vXi64() local
19942 Res = DAG.getNode(Op.getOpcode(), DL, {WideVT, MVT::Other}, in lowerINT_TO_FP_vXi64()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2535 EVT WideVT = Wide.getValueType(); in LowerFP_ROUND() local
2544 if (WideVT.getScalarType() == MVT::f32) { in LowerFP_ROUND()
2547 if (WideVT.getScalarType() == MVT::f64) { in LowerFP_ROUND()
2552 WideVT.isVector() ? WideVT.changeVectorElementType(MVT::f32) in LowerFP_ROUND()
2570 EVT WideVT = Op.getValueType(); in LowerFP_EXTEND() local
2572 if (WideVT.getScalarType() == MVT::f32 && in LowerFP_EXTEND()
2575 return DAG.getNode(ISD::BF16_TO_FP, Loc, WideVT, Narrow); in LowerFP_EXTEND()
2577 if (WideVT.getScalarType() == MVT::f64 && in LowerFP_EXTEND()
2587 return DAG.getNode(ISD::FP_EXTEND, Loc, WideVT, Op); in LowerFP_EXTEND()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp4245 MVT WideVT = MVT::getIntegerVT(ElemSizeInBits * 2); in lowerBuildVectorViaPacking() local
4246 MVT WideVecVT = MVT::getVectorVT(WideVT, NumElts / 2); in lowerBuildVectorViaPacking()
5193 MVT WideVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits * Factor), EC); in getWideningSpread() local
5195 SDValue Result = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, V); in getWideningSpread()
5199 Result = DAG.getNode(ISD::SHL, DL, WideVT, Result, in getWideningSpread()
5200 DAG.getConstant(EltBits * Index, DL, WideVT)); in getWideningSpread()
5236 MVT WideVT = in getWideningInterleave() local
5239 MVT WideContainerVT = WideVT; // <vscale x n x ty*2> in getWideningInterleave()
5241 WideContainerVT = getContainerForFixedLengthVector(DAG, WideVT, Subtarget); in getWideningInterleave()
7378 MVT WideVT = VT.changeVectorElementType(MVT::i8); in LowerOperation() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8187 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in LowerTRUNCATEVector() local
8203 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector()
8221 Op1 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op1); in LowerTRUNCATEVector()
8222 Op2 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op2); in LowerTRUNCATEVector()
8223 return DAG.getVectorShuffle(WideVT, DL, Op1, Op2, ShuffV); in LowerTRUNCATEVector()
8742 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in widenVec() local
8751 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WideVT, Ops); in widenVec()
8773 EVT WideVT = Wide.getValueType(); in LowerINT_TO_FPVector() local
8774 unsigned WideNumElts = WideVT.getVectorNumElements(); in LowerINT_TO_FPVector()
8791 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector()
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp2036 EVT WideVT = WideVal.getValueType(); in EmitTest() local
2063 if (TLI.isOperationLegal(WideVal.getOpcode(), WideVT)) { in EmitTest()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp2410 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane() local
2414 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane()
2461 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane() local
2465 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
H A DAArch64ISelLowering.cpp1080 for (MVT WideVT : MVT::fp_valuetypes()) { in AArch64TargetLowering() local
1082 if (WideVT.getScalarSizeInBits() > NarrowVT.getScalarSizeInBits()) { in AArch64TargetLowering()
1083 setTruncStoreAction(WideVT, NarrowVT, Expand); in AArch64TargetLowering()
15508 EVT WideVT = getPackedSVEVectorVT(InVT.getVectorElementCount()); in LowerINSERT_SUBVECTOR() local
15516 Vec1 = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR()
15525 SDValue HiVec0 = DAG.getNode(AArch64ISD::UUNPKHI, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
15531 SDValue LoVec0 = DAG.getNode(AArch64ISD::UUNPKLO, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
23930 auto WideVT = EVT::getVectorVT( in combineI8TruncStore() local
23933 SDValue UndefVector = DAG.getUNDEF(WideVT); in combineI8TruncStore()
23935 ISD::INSERT_SUBVECTOR, DL, WideVT, in combineI8TruncStore()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1904 EVT WideVT = in WidenOrSplitVectorLoad() local
1909 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue, in WidenOrSplitVectorLoad()