Searched refs:VecEltVT (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 12309 EVT VecEltVT = InVecVT.getVectorElementType(); in scalarizeExtractedVectorLoad() local 12314 if (!VecEltVT.isByteSized()) in scalarizeExtractedVectorLoad() 12318 ResultVT.bitsGT(VecEltVT) ? ISD::EXTLOAD : ISD::NON_EXTLOAD; in scalarizeExtractedVectorLoad() 12319 if (!isOperationLegalOrCustom(ISD::LOAD, VecEltVT)) in scalarizeExtractedVectorLoad() 12327 ByteOffset = VecEltVT.getSizeInBits() * Elt / 8; in scalarizeExtractedVectorLoad() 12334 Alignment = commonAlignment(Alignment, VecEltVT.getSizeInBits() / 8); in scalarizeExtractedVectorLoad() 12337 if (!shouldReduceLoadWidth(OriginalLoad, ExtTy, VecEltVT, ByteOffset)) in scalarizeExtractedVectorLoad() 12341 if (!allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VecEltVT, in scalarizeExtractedVectorLoad() 12353 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad() 12356 ISD::LoadExtType ExtType = isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, VecEltVT) in scalarizeExtractedVectorLoad() [all …]
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| H A D | DAGCombiner.cpp | 27507 EVT VecEltVT = VT.getScalarType(); in visitSCALAR_TO_VECTOR() local 27509 TLI.isBinOp(Opcode) && Scalar.getValueType() == VecEltVT && in visitSCALAR_TO_VECTOR() 27510 Scalar.getOperand(0).getValueType() == VecEltVT && in visitSCALAR_TO_VECTOR() 27511 Scalar.getOperand(1).getValueType() == VecEltVT && in visitSCALAR_TO_VECTOR() 27548 if (VecEltVT != Scalar.getValueType() && in visitSCALAR_TO_VECTOR() 27549 Scalar.getValueType().isScalarInteger() && isTypeLegal(VecEltVT)) { in visitSCALAR_TO_VECTOR() 27550 SDValue Val = DAG.getNode(ISD::TRUNCATE, SDLoc(Scalar), VecEltVT, Scalar); in visitSCALAR_TO_VECTOR() 27562 if (VecEltVT == SrcVT.getScalarType() && VTNumElts <= SrcNumElts) { in visitSCALAR_TO_VECTOR()
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| H A D | SelectionDAG.cpp | 12582 EVT VecEltVT = N->getValueType(0).getVectorElementType(); in isConstOrConstSplat() local 12585 assert(CVT.bitsGE(VecEltVT) && "Illegal splat_vector element extension"); in isConstOrConstSplat() 12586 if (AllowTruncation || CVT == VecEltVT) in isConstOrConstSplat()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 14191 EVT VecEltVT = VecVT.getVectorElementType(); in performExtractVectorEltCombine() local 14195 unsigned VecEltSize = VecEltVT.getSizeInBits(); in performExtractVectorEltCombine() 14211 if (Vec.hasOneUse() && DCI.isBeforeLegalize() && VecEltVT == ResVT) { in performExtractVectorEltCombine() 14269 if (isa<MemSDNode>(Vec) && VecEltSize <= 16 && VecEltVT.isByteSized() && in performExtractVectorEltCombine() 14288 EVT VecEltAsIntVT = VecEltVT.changeTypeToInteger(); in performExtractVectorEltCombine() 14292 if (VecEltVT == ResVT) { in performExtractVectorEltCombine() 14293 return DAG.getNode(ISD::BITCAST, SL, VecEltVT, Trunc); in performExtractVectorEltCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11244 MVT VecEltVT = VecVT.getVectorElementType(); in lowerVECREDUCE() local 11255 SDValue StartV = DAG.getNeutralElement(BaseOpc, DL, VecEltVT, SDNodeFlags()); in lowerVECREDUCE() 11263 StartV = DAG.getExtractVectorElt(DL, VecEltVT, Vec, 0); in lowerVECREDUCE() 11307 MVT VecEltVT = Op.getSimpleValueType(); in lowerFPVECREDUCE() local 11312 getRVVFPReductionOpAndOperands(Op, DAG, VecEltVT, Subtarget); in lowerFPVECREDUCE()
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