Searched refs:TEGRA234_CLK_PLLC4 (Results 1 – 2 of 2) sorted by relevance
451 #define TEGRA234_CLK_PLLC4 237U macro
1000 <&bpmp TEGRA234_CLK_PLLC4>;1001 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLC4>;