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Searched refs:SpillAlignment (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DInfoByHwMode.cpp123 SpillAlignment = R->getValueAsInt("SpillAlignment"); in RegSizeInfo()
127 return std::tie(RegSize, SpillSize, SpillAlignment) < in operator <()
128 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); in operator <()
132 return RegSize <= I.RegSize && SpillAlignment && in isSubClassOf()
133 I.SpillAlignment % SpillAlignment == 0 && SpillSize <= I.SpillSize; in isSubClassOf()
137 OS << "[R=" << RegSize << ",S=" << SpillSize << ",A=" << SpillAlignment in writeToStream()
171 return std::tie(A0.SpillSize, A0.SpillAlignment) > in hasStricterSpillThan()
172 std::tie(B0.SpillSize, B0.SpillAlignment); in hasStricterSpillThan()
H A DInfoByHwMode.h185 unsigned SpillAlignment; member
191 return std::tie(RegSize, SpillSize, SpillAlignment) ==
192 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
H A DCodeGenRegisters.cpp742 RI.SpillAlignment = R->getValueAsInt("Alignment"); in CodeGenRegisterClass()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h242 unsigned RegSize, SpillSize, SpillAlignment; member
309 return Align(getRegClassInfo(RC).SpillAlignment / 8); in getSpillAlign()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroFrame.cpp1058 auto SpillAlignment = Align(FrameData.getAlign(Def)); in insertSpills() local
1081 Builder.CreateAlignedStore(Value, G, SpillAlignment); in insertSpills()
1083 Builder.CreateAlignedStore(Def, G, SpillAlignment); in insertSpills()
1104 SpillAlignment, E.first->getName() + Twine(".reload")); in insertSpills()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp1326 << RI.SpillAlignment; in runTargetDesc()
1884 OS << ' ' << getModeName(M) << ':' << RC.RSI.get(M).SpillAlignment; in debugDump()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td81 int SpillAlignment = SA; // Spill slot alignment in bits.