Searched refs:SecondReg (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 2254 Register &FirstReg, Register &SecondReg, Register &BaseReg, int &Offset, in CanFormLdStDWord() argument
2311 SecondReg = Op1->getOperand(0).getReg(); in CanFormLdStDWord()
2312 if (FirstReg == SecondReg) in CanFormLdStDWord()
2413 Register FirstReg, SecondReg; in RescheduleOps() local
2421 FirstReg, SecondReg, BaseReg, in RescheduleOps()
2429 MRI->constrainRegClass(SecondReg, TRC); in RescheduleOps()
2435 .addReg(SecondReg, RegState::Define) in RescheduleOps()
2449 .addReg(SecondReg) in RescheduleOps()
2466 MRI->setRegAllocationHint(FirstReg, ARMRI::RegPairEven, SecondReg); in RescheduleOps()
2467 MRI->setRegAllocationHint(SecondReg, ARMRI::RegPairOdd, FirstReg); in RescheduleOps()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4356 MCRegister SecondReg = Inst.getOperand(1).getReg(); in expandTrunc() local
4372 FirstReg, SecondReg, IDLoc, STI); in expandTrunc()
4380 FirstReg, SecondReg, IDLoc, STI); in expandTrunc()
5297 MCRegister SecondReg = nextReg(FirstReg); in expandLoadStoreDMacro() local
5299 if (!SecondReg) in expandLoadStoreDMacro()
5318 TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI); in expandLoadStoreDMacro()
5320 TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI); in expandLoadStoreDMacro()
5344 MCRegister SecondReg = nextReg(FirstReg); in expandStoreDM1Macro() local
5346 if (!SecondReg) in expandStoreDM1Macro()
5362 std::swap(FirstReg, SecondReg); in expandStoreDM1Macro()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 8438 MCRegister SecondReg; in tryParseGPRSeqPair() local
8439 Res = tryParseScalarRegister(SecondReg); in tryParseGPRSeqPair()
8444 if (RI->getEncodingValue(SecondReg) != FirstEncoding + 1 || in tryParseGPRSeqPair()
8445 (isXReg && !XRegClass.contains(SecondReg)) || in tryParseGPRSeqPair()
8446 (isWReg && !WRegClass.contains(SecondReg))) in tryParseGPRSeqPair()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1628 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect() local
1645 .addReg(FirstReg).addReg(SecondReg) in insertSelect()
|
| H A D | PPCISelLowering.cpp | 7067 const MCRegister SecondReg = State.AllocateReg(PPC::R10); in CC_AIX() local
7068 assert(FirstReg && SecondReg && in CC_AIX()
7073 CCValAssign::getCustomReg(ValNo, ValVT, SecondReg, RegVT, LocInfo)); in CC_AIX()
|