Searched refs:STRD (Results 1 – 13 of 13) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA57.td | 613 // STRH,STRD: 3cyc "I0/I1, S" for minus reg, 1cyc S for imm or for plus reg. 623 def : InstRW<[A57WriteStrAm3X2], (instregex "STRD$")>; 649 // pre-indexed STRH/STRD (STRH_PRE, STRD_PRE) 681 // post-indexed STRH/STRD(STRH_POST, STRD_POST), STRHTi, STRHTr
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H A D | ARMLoadStoreOptimizer.cpp | 222 bool isAM3 = Opcode == ARM::LDRD || Opcode == ARM::STRD; in getMemoryOpOffset() 1767 if (Opcode != ARM::LDRD && Opcode != ARM::STRD && Opcode != ARM::t2LDRDi8) in FixInvalidRegPairOp() 1782 bool NonConsecutiveRegs = (Opcode == ARM::LDRD || Opcode == ARM::STRD) && in FixInvalidRegPairOp() 2269 NewOpc = ARM::STRD; in CanFormLdStDWord()
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H A D | ARMISelLowering.h | 359 STRD enumerator
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H A D | ARMScheduleR52.td | 501 (instregex "STRD$", "t2STRDi8", "STL", "t2STL")>;
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H A D | ARMScheduleSwift.td | 502 (instregex "STRD$", "t2STRDi8")>;
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H A D | ARMBaseInstrInfo.cpp | 1177 MachineInstrBuilder MIB = BuildMI(MBB, I, DebugLoc(), get(ARM::STRD)); in storeRegToStackSlot() 3604 case ARM::STRD: { in getNumMicroOpsSwiftLdSt()
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H A D | ARMExpandPseudoInsts.cpp | 3228 TII->get(Opcode == ARM::LOADDUAL ? ARM::LDRD : ARM::STRD)) in ExpandMI()
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H A D | ARMInstrInfo.td | 251 def ARMstrd : SDNode<"ARMISD::STRD", SDT_ARMstrd, [SDNPHasChain, SDNPMayStore, SDNPMemOpera… 3157 def STRD : AI3str<0b1111, (outs), (ins GPR:$Rt, GPR:$Rt2, addrmode3:$addr),
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H A D | ARMISelDAGToDAG.cpp | 4076 case ARMISD::STRD: { in Select()
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H A D | ARMISelLowering.cpp | 1756 MAKE_CASE(ARMISD::STRD) in getTargetNodeName() 10245 return DAG.getMemIntrinsicNode(ARMISD::STRD, dl, DAG.getVTList(MVT::Other), in LowerSTORE()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2225 case ARM::STRD: in DecodeAddrMode3Instruction() 2237 case ARM::STRD: in DecodeAddrMode3Instruction() 2324 case ARM::STRD: in DecodeAddrMode3Instruction() 2341 case ARM::STRD: in DecodeAddrMode3Instruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.td | 4074 defm STRD : Store64RO<0b11, 1, 0b00, FPR64Op, "str", f64, store>; 4195 defm STRD : StoreUI<0b11, 1, 0b00, FPR64Op, uimm12s8, "str",
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 7786 case ARM::STRD: in validateInstruction()
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