Searched refs:Reductions (Results 1 – 15 of 15) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.h | 302 const ReductionList &getReductionVars() const { return Reductions; } in getReductionVars() 309 return Reductions.find(PN)->second; in getRecurrenceDescriptor() 351 bool isReductionVariable(PHINode *PN) const { return Reductions.count(PN); } in isReductionVariable() 601 ReductionList Reductions; variable
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPNodes.def | 75 /// Reductions.
|
| H A D | VVPInstrInfo.td | 186 // Reductions
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 607 Reductions = 0x02, enumerator 610 All = Reductions | Recurrences | Simple | Reverse
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopInterchange.cpp | 1025 SmallPtrSetImpl<PHINode *> &Reductions) { in areInnerLoopExitPHIsSupported() argument 1031 if (any_of(PHI.users(), [&Reductions, OuterL](User *U) { in areInnerLoopExitPHIsSupported() 1034 (!Reductions.count(PN) && OuterL->contains(PN->getParent())); in areInnerLoopExitPHIsSupported()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorizationLegality.cpp | 839 Reductions[Phi] = RedDes; in canVectorizeInstrs() 1655 if (Reductions.size() || FixedOrderRecurrences.size()) { in isVectorizableEarlyExitLoop()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 608 ///// Reductions {
|
| H A D | Intrinsics.td | 2324 // Reductions
|
| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGOpenMPRuntime.h | 118 llvm::Value *Reductions = nullptr; member
|
| H A D | CGStmtOpenMP.cpp | 4945 Data.Reductions = CGM.getOpenMPRuntime().emitTaskReductionInit( in EmitOMPTaskBasedDirective() 5132 if (Data.Reductions) { in EmitOMPTaskBasedDirective() 5424 if (Data.Reductions) { in processInReduction()
|
| H A D | CGOpenMPRuntime.cpp | 4651 if (Data.Reductions) { in emitTaskLoopCall() 4652 CGF.EmitStoreOfScalar(Data.Reductions, RedLVal); in emitTaskLoopCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSchedSiFiveP800.td | 106 // VEXQ1 handle Complex Slide, Permutation, Reductions, Divide instructions.
|
| H A D | RISCVSchedSiFiveP600.td | 341 // VEXQ1 handle Complex Slide, Permutation, Reductions, Divide instructions.
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 164 setEnableBit(TailFoldingOpts::Reductions); in operator =() 170 setDisableBit(TailFoldingOpts::Reductions); in operator =() 5878 Required |= TailFoldingOpts::Reductions; in preferPredicateOverEpilogue()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrSIMD.td | 981 // Reductions already return 0 or 1, so and 1, setne 0, and seteq 1
|