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Searched refs:RISCVRegisterClass (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.h345 enum RISCVRegisterClass { GPRRC, FPRRC, VRRC }; enum
348 case RISCVRegisterClass::GPRRC: in getNumberOfRegisters()
352 case RISCVRegisterClass::FPRRC: in getNumberOfRegisters()
356 case RISCVRegisterClass::VRRC: in getNumberOfRegisters()
368 return RISCVRegisterClass::VRRC;
370 return RISCVRegisterClass::GPRRC;
376 return RISCVRegisterClass::FPRRC;
379 return RISCVRegisterClass::GPRRC;
384 case RISCVRegisterClass::GPRRC: in getRegisterClassName()
386 case RISCVRegisterClass::FPRRC: in getRegisterClassName()
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H A DRISCVRegisterInfo.td135 class RISCVRegisterClass<list<ValueType> regTypes, int align, dag regList>
149 : RISCVRegisterClass<[XLenVT, XLenFVT, i32], 32, regList> {
250 def FPR16 : RISCVRegisterClass<[f16, bf16], 16, (add
259 def FPR32 : RISCVRegisterClass<[f32], 32, (add
268 def FPR32C : RISCVRegisterClass<[f32], 32, (add
275 def FPR64 : RISCVRegisterClass<[f64], 64, (add
284 def FPR64C : RISCVRegisterClass<[f64], 64, (add
485 def VCSR : RISCVRegisterClass<[XLenVT], 32,
504 : RISCVRegisterClass<regTypes,
560 def GPRF16 : RISCVRegisterClass<[f16], 16, (add GPR)>;
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