Home
last modified time | relevance | path

Searched refs:RHSMask (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp499 unsigned LHSMask, unsigned RHSMask, InstCombiner::BuilderTy &Builder) { in foldLogOpOfMaskedICmpsAsymmetric() argument
509 RHSMask = conjugateICmpMask(RHSMask); in foldLogOpOfMaskedICmpsAsymmetric()
511 if ((LHSMask & Mask_NotAllZeros) && (RHSMask & BMask_Mixed)) { in foldLogOpOfMaskedICmpsAsymmetric()
516 } else if ((LHSMask & BMask_Mixed) && (RHSMask & Mask_NotAllZeros)) { in foldLogOpOfMaskedICmpsAsymmetric()
540 unsigned RHSMask = MaskPair->second; in foldLogOpOfMaskedICmps() local
541 unsigned Mask = LHSMask & RHSMask; in foldLogOpOfMaskedICmps()
546 LHS, RHS, IsAnd, A, B, C, D, E, PredL, PredR, LHSMask, RHSMask, in foldLogOpOfMaskedICmps()
H A DInstCombineVectorOps.cpp3192 ArrayRef<int> RHSMask; in visitShuffleVectorInst() local
3196 RHSMask = RHSShuffle->getShuffleMask(); in visitShuffleVectorInst()
3232 eltMask = RHSMask[Mask[i]-LHSWidth]; in visitShuffleVectorInst()
3265 if (isSplat || newMask == LHSMask || newMask == RHSMask || newMask == Mask) { in visitShuffleVectorInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp12415 uint32_t RHSMask = getPermuteMask(RHS); in performAndCombine() local
12416 if (LHSMask != ~0u && RHSMask != ~0u) { in performAndCombine()
12419 if (LHSMask > RHSMask) { in performAndCombine()
12420 std::swap(LHSMask, RHSMask); in performAndCombine()
12427 uint32_t RHSUsedLanes = ~(RHSMask & 0x0c0c0c0c) & 0x0c0c0c0c; in performAndCombine()
12439 uint32_t Mask = LHSMask & RHSMask; in performAndCombine()
12442 if ((LHSMask & ByteSel) == 0x0c || (RHSMask & ByteSel) == 0x0c) in performAndCombine()
13123 uint32_t RHSMask = getPermuteMask(RHS); in performOrCombine() local
13125 if (LHSMask != ~0u && RHSMask != ~0u) { in performOrCombine()
13128 if (LHSMask > RHSMask) { in performOrCombine()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp8172 const APInt &RHSMask = N1O1C->getAPIntValue(); in visitORLike() local
8174 if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) && in visitORLike()
8175 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) { in visitORLike()
8179 DAG.getConstant(LHSMask | RHSMask, DL, VT)); in visitORLike()
8892 SDValue RHSMask; // AND value if any. in MatchRotate() local
8893 matchRotateHalf(DAG, RHS, RHSShift, RHSMask); in MatchRotate()
8910 extractShiftForRotate(DAG, LHSShift, RHS, RHSMask, DL)) in MatchRotate()
8931 std::swap(LHSMask, RHSMask); in MatchRotate()
8951 if (LHSMask.getNode() || RHSMask.getNode()) { in MatchRotate()
8960 if (RHSMask.getNode()) { in MatchRotate()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp15304 int RHSMask[4] = {-1, -1, -1, -1}; in lowerShuffleAsLanePermuteAndSHUFP() local
15314 auto &LaneMask = (i & 1) ? RHSMask : LHSMask; in lowerShuffleAsLanePermuteAndSHUFP()
15320 SDValue RHS = DAG.getVectorShuffle(VT, DL, V1, V2, RHSMask); in lowerShuffleAsLanePermuteAndSHUFP()
47623 SmallVector<int, 64> LHSMask, RHSMask, ByteMask; in combineSelect() local
47630 getTargetShuffleMask(RHSShuf, true, RHSOps, RHSMask)) { in combineSelect()
47632 ByteMask.size() == RHSMask.size() && "Shuffle mask mismatch"); in combineSelect()
47638 RHSMask[I] = 0x80; in combineSelect()
47641 RHSMask[I] = isUndefOrZero(RHSMask[I]) ? 0x80 : RHSMask[I]; in combineSelect()
47648 getConstVector(RHSMask, ByteVT, DAG, DL, true)); in combineSelect()