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Searched refs:PRIVATE_ADDRESS (Results 1 – 25 of 27) sorted by relevance

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/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DAMDGPU.cpp44 llvm::AMDGPUAS::PRIVATE_ADDRESS, // opencl_private
55 llvm::AMDGPUAS::PRIVATE_ADDRESS, // sycl_private
63 llvm::AMDGPUAS::PRIVATE_ADDRESS, // hlsl_private
65 llvm::AMDGPUAS::PRIVATE_ADDRESS, // hlsl_input
69 llvm::AMDGPUAS::PRIVATE_ADDRESS, // Default
73 llvm::AMDGPUAS::PRIVATE_ADDRESS, // opencl_private
91 llvm::AMDGPUAS::PRIVATE_ADDRESS, // hlsl_private
93 llvm::AMDGPUAS::PRIVATE_ADDRESS, // hlsl_input
H A DAMDGPU.h100 if (TargetAS == llvm::AMDGPUAS::PRIVATE_ADDRESS || in getPointerWidthV()
120 toTargetAddressSpace(B) <= llvm::AMDGPUAS::PRIVATE_ADDRESS && in isAddressSpaceSupersetOf()
405 if (AddressSpace == llvm::AMDGPUAS::PRIVATE_ADDRESS) { in getDWARFAddressSpace()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600TargetTransformInfo.cpp54 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
71 return (AddrSpace != AMDGPUAS::PRIVATE_ADDRESS); in isLegalToVectorizeMemChain()
H A DAMDGPUTargetTransformInfo.cpp192 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in getUnrollingPreferences()
202 if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in getUnrollingPreferences()
389 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) in getLoadStoreVecRegBitWidth()
402 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS) { in isLegalToVectorizeMemChain()
985 return Load->getPointerAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS || in isSourceOfDivergence()
1111 AMDGPUAS::LOCAL_ADDRESS : AMDGPUAS::PRIVATE_ADDRESS; in rewriteIntrinsicWithAddressSpace()
1345 AMDGPUAS::PRIVATE_ADDRESS, TTI::TCK_SizeAndLatency); in adjustInliningThresholdUsingCallee()
1348 AMDGPUAS::PRIVATE_ADDRESS, TTI::TCK_SizeAndLatency); in adjustInliningThresholdUsingCallee()
1374 AddrSpace != AMDGPUAS::PRIVATE_ADDRESS) in getCallArgsTotalAllocaSize()
H A DAMDGPUAliasAnalysis.cpp68 (asB == AMDGPUAS::LOCAL_ADDRESS || asB == AMDGPUAS::PRIVATE_ADDRESS)) { in alias()
H A DR600ISelLowering.cpp1024 assert(Store->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateTruncStore()
1057 MachinePointerInfo PtrInfo(AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateTruncStore()
1125 if ((AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS || in LowerSTORE()
1128 if ((AS == AMDGPUAS::PRIVATE_ADDRESS) && TruncatingStore) { in LowerSTORE()
1207 if (AS != AMDGPUAS::PRIVATE_ADDRESS) in LowerSTORE()
1289 MachinePointerInfo PtrInfo(AMDGPUAS::PRIVATE_ADDRESS); in lowerPrivateExtLoad()
1327 if (AS == AMDGPUAS::PRIVATE_ADDRESS && in LowerLOAD()
1338 LoadNode->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) && in LowerLOAD()
1395 if (LoadNode->getAddressSpace() != AMDGPUAS::PRIVATE_ADDRESS) { in LowerLOAD()
1537 if ((AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS)) { in canMergeStoresTo()
H A DAMDGPUTargetTransformInfo.h207 AS != AMDGPUAS::PRIVATE_ADDRESS; in canHaveNonUndefGlobalInitializerInAddressSpace()
H A DAMDGPUAttributor.cpp117 return SrcAS == AMDGPUAS::LOCAL_ADDRESS || SrcAS == AMDGPUAS::PRIVATE_ADDRESS; in castRequiresQueuePtr()
248 if (SrcAS == AMDGPUAS::PRIVATE_ADDRESS) in visitConstExpr()
748 AMDGPUAS::PRIVATE_ADDRESS; in needFlatScratchInit()
H A DAMDGPUTargetMachine.cpp967 AddrSpace == AMDGPUAS::PRIVATE_ADDRESS || in getNullPointerValue()
1010 return std::pair(II->getArgOperand(0), AMDGPUAS::PRIVATE_ADDRESS); in getPredicatedAddrSpace()
1035 return AMDGPUAS::PRIVATE_ADDRESS; in getAddressSpaceForPseudoSourceKind()
H A DSIRegisterInfo.cpp953 return !TII->isLegalFLATOffset(FullOffset, AMDGPUAS::PRIVATE_ADDRESS, in needsFrameBaseReg()
1119 assert(TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in resolveFrameIndex()
1162 return TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in isFrameOffsetLegal()
1659 IsFlat ? TII->isLegalFLATOffset(MaxOffset, AMDGPUAS::PRIVATE_ADDRESS, in buildSpillLoadStore()
2928 if (TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, in eliminateFrameIndex()
H A DSIISelLowering.cpp1616 : AddrSpace == AMDGPUAS::PRIVATE_ADDRESS ? SIInstrFlags::FlatScratch in isLegalFlatAddressingMode()
1753 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in isLegalAddressingMode()
1755 ? isLegalFlatAddressingMode(AM, AMDGPUAS::PRIVATE_ADDRESS) in isLegalAddressingMode()
1793 if (AS == AMDGPUAS::PRIVATE_ADDRESS) { in canMergeStoresTo()
1932 if (AddrSpace == AMDGPUAS::PRIVATE_ADDRESS || in allowsMisalignedMemoryAccessesImpl()
2011 AS == AMDGPUAS::PRIVATE_ADDRESS; in isNonGlobalAddrSpace()
4008 MachinePointerInfo(AMDGPUAS::PRIVATE_ADDRESS)); in LowerCall()
7625 DestAS == AMDGPUAS::PRIVATE_ADDRESS) { in lowerADDRSPACECAST()
7643 SrcAS == AMDGPUAS::PRIVATE_ADDRESS) { in lowerADDRSPACECAST()
8185 GSD->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) { in LowerGlobalAddress()
[all …]
H A DAMDGPUCallLowering.cpp114 LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32), FI); in getStackAddress()
197 const LLT PtrTy = LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32); in getStackAddress()
H A DAMDGPUHSAMetadataStreamer.cpp116 case AMDGPUAS::PRIVATE_ADDRESS: in getAddressSpaceQualifier()
H A DAMDGPUISelDAGToDAG.cpp1596 AMDGPUTargetMachine::getNullPointerValue(AMDGPUAS::PRIVATE_ADDRESS); in SelectMUBUFScratchOffen()
2011 if (!TII->isLegalFLATOffset(COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, in SelectScratchSAddr()
2015 COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, SIInstrFlags::FlatScratch); in SelectScratchSAddr()
2063 if (TII->isLegalFLATOffset(COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, in SelectScratchSVAddr()
2073 COffsetVal, AMDGPUAS::PRIVATE_ADDRESS, SIInstrFlags::FlatScratch); in SelectScratchSVAddr()
H A DAMDGPUCodeGenPrepare.cpp2175 DstAS == AMDGPUAS::PRIVATE_ADDRESS); in visitAddrSpaceCastInst()
2178 SrcAS == AMDGPUAS::PRIVATE_ADDRESS); in visitAddrSpaceCastInst()
H A DAMDGPULegalizerInfo.cpp393 case AMDGPUAS::PRIVATE_ADDRESS: in maxSizeForAddrSpace()
683 const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS); in AMDGPULegalizerInfo()
2248 assert(AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::PRIVATE_ADDRESS); in getSegmentAperture()
2380 DestAS == AMDGPUAS::PRIVATE_ADDRESS)) { in legalizeAddrSpaceCast()
2408 SrcAS == AMDGPUAS::PRIVATE_ADDRESS)) { in legalizeAddrSpaceCast()
7511 return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::PRIVATE_ADDRESS); in legalizeIntrinsic()
H A DAMDGPULibCalls.cpp1377 AMDGPULibFunc::getEPtrKindFromAddrSpace(AMDGPUAS::PRIVATE_ADDRESS); in fold_sincos()
H A DSIFrameLowering.cpp1901 if (TII->isLegalFLATOffset(MaxOffset, AMDGPUAS::PRIVATE_ADDRESS, in allocateScavengingFrameIndexesNearIncomingSP()
H A DSIMemoryLegalizer.cpp782 if (AS == AMDGPUAS::PRIVATE_ADDRESS) in toSIAtomicAddrSpace()
H A DAMDGPUInstructionSelector.cpp5517 TII.isLegalFLATOffset(ConstOffset, AMDGPUAS::PRIVATE_ADDRESS, in selectScratchSAddr()
5594 TII.isLegalFLATOffset(ConstOffset, AMDGPUAS::PRIVATE_ADDRESS, in selectScratchSVAddr()
5650 Offset != TM.getNullPointerValue(AMDGPUAS::PRIVATE_ADDRESS)) { in selectMUBUFScratchOffen()
H A DSIInsertWaitcnts.cpp2182 return AS == AMDGPUAS::PRIVATE_ADDRESS || AS == AMDGPUAS::FLAT_ADDRESS; in mayAccessScratchThroughFlat()
H A DSIInstrInfo.cpp9124 (*MI.memoperands_begin())->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS); in isStackAccess()
10049 return mmo->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS || in getGenericInstructionUniformity()
10110 return mmo->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS || in getInstructionUniformity()
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DAMDGPUAddrSpace.h36 PRIVATE_ADDRESS = 5, ///< Address space for private memory. enumerator
/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DAMDGPU.cpp544 llvm::APInt(32, llvm::AMDGPUAS::PRIVATE_ADDRESS), in setTargetAtomicMetadata()
545 llvm::APInt(32, llvm::AMDGPUAS::PRIVATE_ADDRESS + 1)); in setTargetAtomicMetadata()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DAutoUpgrade.cpp4427 MDB.createRange(APInt(32, AMDGPUAS::PRIVATE_ADDRESS), in upgradeAMDGCNIntrinsicCall()
4428 APInt(32, AMDGPUAS::PRIVATE_ADDRESS + 1)); in upgradeAMDGCNIntrinsicCall()

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