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Searched refs:OutMI (Results 1 – 25 of 46) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMCInstLower.cpp223 lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const { in lowerLongBranchLUi()
224 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
227 OutMI.addOperand(LowerOperand(MI->getOperand(0))); in lowerLongBranchLUi()
252 OutMI.addOperand(MCOperand::createExpr(MipsExpr)); in lowerLongBranchLUi()
255 OutMI.addOperand(createSub(MI->getOperand(1).getMBB(), in lowerLongBranchLUi()
261 MCInst &OutMI, int Opcode) const { in lowerLongBranchADDiu() argument
262 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
286 OutMI.addOperand(LowerOperand(MO)); in lowerLongBranchADDiu()
294 OutMI.addOperand(MCOperand::createExpr(MipsExpr)); in lowerLongBranchADDiu()
297 OutMI.addOperand(createSub(MI->getOperand(2).getMBB(), in lowerLongBranchADDiu()
[all …]
H A DMipsMCInstLower.h37 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
45 void lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const;
46 void lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI,
48 bool lowerLongBranch(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMCInstLower.cpp44 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI);
166 MCInst &OutMI) const { in lower()
167 OutMI.setOpcode(MI->getOpcode()); in lower()
284 OutMI.addOperand(MCOp); in lower()
288 removeRegisterOperands(MI, OutMI); in lower()
290 OutMI.insert(OutMI.begin(), MCOperand::createImm(MI->getNumExplicitDefs())); in lower()
293 static void removeRegisterOperands(const MachineInstr *MI, MCInst &OutMI) { in removeRegisterOperands() argument
311 auto RegOpcode = OutMI.getOpcode(); in removeRegisterOperands()
314 OutMI.setOpcode(StackOpcode); in removeRegisterOperands()
317 for (auto I = OutMI.getNumOperands(); I; --I) { in removeRegisterOperands()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUMCInstLower.cpp122 MCInst &OutMI) const { in lowerT16D16Helper()
153 OutMI.setOpcode(MCOpcode); in lowerT16D16Helper()
163 OutMI.addOperand(MCOp); in lowerT16D16Helper()
169 OutMI.addOperand(MCOp); in lowerT16D16Helper()
173 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
185 OutMI.setOpcode(TII->pseudoToMCOpcode(AMDGPU::S_SWAPPC_B64)); in lower()
189 OutMI.addOperand(Dest); in lower()
190 OutMI.addOperand(Src); in lower()
197 lowerT16D16Helper(MI, OutMI); in lower()
208 OutMI.setOpcode(MCOpcode); in lower()
[all …]
H A DR600MCInstLower.cpp30 void lower(const MachineInstr *MI, MCInst &OutMI) const;
38 void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
39 OutMI.setOpcode(MI->getOpcode()); in lower()
43 OutMI.addOperand(MCOp); in lower()
H A DAMDGPUMCInstLower.h41 void lower(const MachineInstr *MI, MCInst &OutMI) const;
43 void lowerT16D16Helper(const MachineInstr *MI, MCInst &OutMI) const;
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVMCInstLower.cpp22 void SPIRVMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI, in lower() argument
24 OutMI.setOpcode(MI->getOpcode()); in lower()
27 OutMI.setFlags(SPIRV::INST_PRINTER_WIDTH16); in lower()
70 OutMI.addOperand(MCOp); in lower()
H A DSPIRVMCInstLower.h24 void lower(const MachineInstr *MI, MCInst &OutMI,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MCInstLower.cpp376 void AArch64MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
377 OutMI.setOpcode(MI->getOpcode()); in Lower()
382 OutMI.addOperand(MCOp); in Lower()
385 switch (OutMI.getOpcode()) { in Lower()
387 OutMI = MCInst(); in Lower()
388 OutMI.setOpcode(AArch64::RET); in Lower()
389 OutMI.addOperand(MCOperand::createReg(AArch64::LR)); in Lower()
392 OutMI = MCInst(); in Lower()
393 OutMI.setOpcode(AArch64::RET); in Lower()
394 OutMI.addOperand(MCOperand::createReg(AArch64::LR)); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kMCInstLower.cpp161 void M68kMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
163 OutMI.setOpcode(Opcode); in Lower()
170 OutMI.addOperand(MCOp.value()); in Lower()
175 assert(OutMI.getNumOperands() == 1 && "Unexpected number of operands"); in Lower()
184 OutMI.setOpcode(Opcode); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMCInstLower.cpp47 void BPFMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
48 OutMI.setOpcode(MI->getOpcode()); in Lower()
82 OutMI.addOperand(MCOp); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp81 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
405 void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
406 OutMI.setOpcode(MI->getOpcode()); in Lower()
410 OutMI.addOperand(Op); in Lower()
413 if (X86::optimizeInstFromVEX3ToVEX2(OutMI, MI->getDesc()) || in Lower()
414 X86::optimizeShiftRotateWithImmediateOne(OutMI) || in Lower()
415 X86::optimizeVPCMPWithImmediateOneOrSix(OutMI) || in Lower()
416 X86::optimizeMOVSX(OutMI) || X86::optimizeINCDEC(OutMI, In64BitMode) || in Lower()
417 X86::optimizeMOV(OutMI, In64BitMode) || in Lower()
418 X86::optimizeToFixedRegisterOrShortImmediateForm(OutMI)) in Lower()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEMCInstLower.cpp77 void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerVEMachineInstrToMCInst() argument
79 OutMI.setOpcode(MI->getOpcode()); in LowerVEMachineInstrToMCInst()
85 OutMI.addOperand(MCOp); in LowerVEMachineInstrToMCInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZMCInstLower.cpp94 void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { in lower()
95 OutMI.setOpcode(MI->getOpcode()); in lower()
99 OutMI.addOperand(lowerOperand(MO)); in lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreMCInstLower.cpp101 void XCoreMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
102 OutMI.setOpcode(MI->getOpcode()); in Lower()
108 OutMI.addOperand(MCOp); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCMCInstLower.cpp103 void ARCMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
104 OutMI.setOpcode(MI->getOpcode()); in Lower()
110 OutMI.addOperand(MCOp); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYMCInstLower.cpp27 void CSKYMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
28 OutMI.setOpcode(MI->getOpcode()); in Lower()
33 OutMI.addOperand(MCOp); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVAsmPrinter.cpp129 bool lowerToMCInst(const MachineInstr *MI, MCInst &OutMI);
1069 MCInst &OutMI, in lowerRISCVVMachineInstrToMCInst() argument
1076 OutMI.setOpcode(RVV->BaseInstr); in lowerRISCVVMachineInstrToMCInst()
1108 const MCInstrDesc &OutMCID = TII->get(OutMI.getOpcode()); in lowerRISCVVMachineInstrToMCInst()
1111 if (OutMCID.getOperandConstraint(OutMI.getNumOperands(), MCOI::TIED_TO) < in lowerRISCVVMachineInstrToMCInst()
1158 OutMI.addOperand(MCOp); in lowerRISCVVMachineInstrToMCInst()
1163 const MCInstrDesc &OutMCID = TII->get(OutMI.getOpcode()); in lowerRISCVVMachineInstrToMCInst()
1164 if (OutMI.getNumOperands() < OutMCID.getNumOperands()) { in lowerRISCVVMachineInstrToMCInst()
1165 assert(OutMCID.operands()[OutMI.getNumOperands()].RegClass == in lowerRISCVVMachineInstrToMCInst()
1168 OutMI.addOperand(MCOperand::createReg(RISCV::NoRegister)); in lowerRISCVVMachineInstrToMCInst()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430MCInstLower.cpp115 void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
116 OutMI.setOpcode(MI->getOpcode()); in Lower()
155 OutMI.addOperand(MCOp); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRMCInstLower.cpp67 MCInst &OutMI) const { in lowerInstruction()
69 OutMI.setOpcode(MI.getOpcode()); in lowerInstruction()
115 OutMI.addOperand(MCOp); in lowerInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiMCInstLower.cpp90 void LanaiMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { in Lower()
91 OutMI.setOpcode(MI->getOpcode()); in Lower()
131 OutMI.addOperand(MCOp); in Lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchMCInstLower.cpp183 MCInst &OutMI, AsmPrinter &AP) { in lowerLoongArchMachineInstrToMCInst() argument
184 OutMI.setOpcode(MI->getOpcode()); in lowerLoongArchMachineInstrToMCInst()
189 OutMI.addOperand(MCOp); in lowerLoongArchMachineInstrToMCInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMMCInstLower.cpp136 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerARMMachineInstrToMCInst() argument
138 OutMI.setOpcode(MI->getOpcode()); in LowerARMMachineInstrToMCInst()
176 OutMI.addOperand(MCOp); in LowerARMMachineInstrToMCInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMCInstLower.cpp177 void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, in LowerPPCMachineInstrToMCInst() argument
179 OutMI.setOpcode(MI->getOpcode()); in LowerPPCMachineInstrToMCInst()
184 OutMI.addOperand(MCOp); in LowerPPCMachineInstrToMCInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaAsmPrinter.cpp302 MCInst &OutMI) const { in lowerToMCInst()
303 OutMI.setOpcode(MI->getOpcode()); in lowerToMCInst()
310 OutMI.addOperand(MCOp); in lowerToMCInst()

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