| /freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | aarch32.h | 212 static constexpr uint32_t OpcodeMask = 0x0f000000;
216 static constexpr uint32_t OpcodeMask = 0x0e000000;
224 static constexpr uint32_t OpcodeMask = 0x0ff00000;
239 static constexpr HalfWords OpcodeMask{0xf800, 0x9000};
245 static constexpr HalfWords OpcodeMask{0xf800, 0xc000};
252 static constexpr HalfWords OpcodeMask{0xfbf0, 0x8000};
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | DecoderEmitter.cpp | 890 unsigned OpcodeMask = 0; in emitTable() local
900 OpcodeMask |= (1 << DecoderOp); in emitTable()
1034 return OpcodeMask; in emitTable()
2223 unsigned OpcodeMask) { in emitDecodeInstruction() argument
2224 const bool HasTryDecode = OpcodeMask & ((1 << MCD::OPC_TryDecode) | in emitDecodeInstruction()
2227 OpcodeMask & in emitDecodeInstruction()
2229 const bool HasSoftFail = OpcodeMask & (1 << MCD::OPC_SoftFail); in emitDecodeInstruction()
2634 unsigned OpcodeMask = 0; in run() local
2660 OpcodeMask |= emitTable(OS, TableInfo.Table, FC.getBitWidth(), in run()
2671 OpcodeMask & in run()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.h | 148 const SmallBitVector &OpcodeMask,
290 const SmallBitVector &OpcodeMask) const override;
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| H A D | X86TargetTransformInfo.cpp | 1518 unsigned Opcode1, const SmallBitVector &OpcodeMask, in getAltInstrCost() argument
1520 if (isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask)) in getAltInstrCost()
6440 const SmallBitVector &OpcodeMask) const { in isLegalAltInstr()
6449 assert(OpcodeMask.size() == NumElements && "Mask and VecTy are incompatible"); in isLegalAltInstr()
6455 unsigned Opc = OpcodeMask.test(Lane) ? Opcode1 : Opcode0; in isLegalAltInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
| H A D | aarch32.cpp | 260 return (Wd & FixupInfo<K>::OpcodeMask) == FixupInfo<K>::Opcode; in checkOpcodeArm()
265 return (Hi & FixupInfo<K>::OpcodeMask.Hi) == FixupInfo<K>::Opcode.Hi && in checkOpcodeThumb()
266 (Lo & FixupInfo<K>::OpcodeMask.Lo) == FixupInfo<K>::Opcode.Lo; in checkOpcodeThumb()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 500 const SmallBitVector &OpcodeMask) const { in isLegalAltInstr()
501 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask); in isLegalAltInstr()
980 const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const { in getAltInstrCost() argument
982 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind); in getAltInstrCost()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 866 const SmallBitVector &OpcodeMask) const;
1393 const SmallBitVector &OpcodeMask,
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| H A D | TargetTransformInfoImpl.h | 365 const SmallBitVector &OpcodeMask) const { in isLegalAltInstr() argument
707 const SmallBitVector &OpcodeMask, in getAltInstrCost() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 1635 SmallBitVector OpcodeMask(VL.size() * ScalarTyNumElements, false); in getAltInstrMask() local
1640 OpcodeMask.set(Lane * ScalarTyNumElements, in getAltInstrMask()
1643 return OpcodeMask; in getAltInstrMask()
7152 SmallBitVector OpcodeMask( in reorderTopToBottom() local
7155 if (TTIRef.isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask)) { in reorderTopToBottom()
8829 SmallBitVector OpcodeMask(getAltInstrMask(VL, ScalarTy, Opcode0, Opcode1)); in areAltOperandsProfitable() local
8832 Opcode1, OpcodeMask)) in areAltOperandsProfitable()
9687 SmallBitVector OpcodeMask(getAltInstrMask(VL, ScalarTy, Opcode0, Opcode1)); in canBuildSplitNode() local
9693 TTI->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask) || in canBuildSplitNode()
13839 SmallBitVector OpcodeMask( in getEntryCost() local
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