Searched refs:Off1 (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MachineScheduler.cpp | 37 int64_t &Off0, int64_t &Off1) { in mayOverlapWrite() argument
50 Off1 = AArch64InstrInfo::hasUnscaledLdStOffset(MI1.getOpcode()) in mayOverlapWrite()
54 const MachineInstr &MI = (Off0 < Off1) ? MI0 : MI1; in mayOverlapWrite()
58 return llabs(Off0 - Off1) < StoreSize; in mayOverlapWrite()
72 int64_t Off0, Off1; in tryCandidate() local
74 if (!mayOverlapWrite(*Instr0, *Instr1, Off0, Off1)) { in tryCandidate()
77 return Off0 < Off1; in tryCandidate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonLoadStoreWidening.cpp | 411 int Off1 = getOffset(S1); in areAdjacent() local
414 return (Off1 >= 0) ? Off1 + S1MO.getSize().getValue() == unsigned(Off2) in areAdjacent()
415 : int(Off1 + S1MO.getSize().getValue()) == Off2; in areAdjacent()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Constants.cpp | 2178 APInt Off1(DL.getIndexTypeSizeInBits(getAddrDiscriminator()->getType()), 0); in isKnownCompatibleWith() local
2180 DL, Off1, /*AllowNonInbounds=*/true); in isKnownCompatibleWith()
2186 return Base1 == Base2 && Off1 == Off2; in isKnownCompatibleWith()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyLibCalls.cpp | 867 Value *Off1 = B.getInt32(1); in optimizeStringNCpy() local
868 Value *EndPtr = B.CreateInBoundsGEP(CharTy, Dst, Off1, "stpncpy.end"); in optimizeStringNCpy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 336 SDValue Off1 = Load1->getOperand(OffIdx1); in areLoadsFromSameBasePtr() local
339 if (!isa<ConstantSDNode>(Off0) || !isa<ConstantSDNode>(Off1)) in areLoadsFromSameBasePtr()
343 Offset1 = Off1->getAsZExtVal(); in areLoadsFromSameBasePtr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 7700 unsigned Off1 = rev ? 0 : NumElts / 2; in isVMOVNTruncMask() local
7704 if (M[i + 1] >= 0 && M[i + 1] != (int)(Off1 + i / 2)) in isVMOVNTruncMask()
16747 unsigned Off1 = Rev ? 0 : NumElts; in PerformSplittingToNarrowingStores() local
16752 if (M[I + 1] >= 0 && M[I + 1] != (int)(Off1 + I / 2)) in PerformSplittingToNarrowingStores()
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