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Searched refs:NewBase (Results 1 – 21 of 21) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp112 unsigned NewBase, MachineOperand &NewOffset);
374 unsigned NewBase, int64_t NewOffset) { in fixPastUses() argument
394 MI->getOperand(BasePos).setReg(NewBase); in fixPastUses()
452 unsigned NewBase, in changeToAddrMode() argument
470 Ldst.addOperand(MachineOperand::CreateReg(NewBase, true)); in changeToAddrMode()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLoadStoreOpt.h51 void setBase(Register NewBase) { BaseReg = NewBase; } in setBase() argument
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DLoads.cpp359 if (const SCEVUnknown *NewBase = dyn_cast<SCEVUnknown>(AccessStart)) { in isDereferenceableAndAlignedInLoop() local
360 Base = NewBase->getValue(); in isDereferenceableAndAlignedInLoop()
368 const auto *NewBase = dyn_cast<SCEVUnknown>(MinAdd->getOperand(1)); in isDereferenceableAndAlignedInLoop() local
369 if (!Offset || !NewBase) in isDereferenceableAndAlignedInLoop()
390 Base = NewBase->getValue(); in isDereferenceableAndAlignedInLoop()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp449 Register NewBase = MRI.createVirtualRegister(&RISCV::GPRRegClass); in lowerVSPILL() local
467 BuildMI(MBB, II, DL, TII->get(RISCV::ADD), NewBase) in lowerVSPILL()
470 Base = NewBase; in lowerVSPILL()
532 Register NewBase = MRI.createVirtualRegister(&RISCV::GPRRegClass); in lowerVRELOAD() local
544 BuildMI(MBB, II, DL, TII->get(RISCV::ADD), NewBase) in lowerVRELOAD()
547 Base = NewBase; in lowerVRELOAD()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DHexagon.cpp103 llvm::Value *NewBase = IsLoad ? Builder.CreateExtractValue(Result, 1) in EmitHexagonBuiltinExpr() local
108 Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment()); in EmitHexagonBuiltinExpr()
/freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/
H A DPointer.h322 unsigned NewBase = asBlockPointer().Base - getInlineDesc()->Offset; in getBase() local
323 return Pointer(asBlockPointer().Pointee, NewBase, NewBase); in getBase()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp681 unsigned NewBase; in CreateLoadStoreMulti() local
685 NewBase = Regs[NumRegs-1].first; in CreateLoadStoreMulti()
696 NewBase = findFreeReg(isThumb1 ? ARM::tGPRRegClass : ARM::GPRRegClass); in CreateLoadStoreMulti()
697 if (NewBase == 0) in CreateLoadStoreMulti()
735 if (Base != NewBase && in CreateLoadStoreMulti()
738 if (isARMLowRegister(NewBase) && isARMLowRegister(Base) && in CreateLoadStoreMulti()
743 BuildMI(MBB, InsertBefore, DL, TII->get(ARM::tMOVSr), NewBase) in CreateLoadStoreMulti()
746 BuildMI(MBB, InsertBefore, DL, TII->get(ARM::tMOVr), NewBase) in CreateLoadStoreMulti()
751 Base = NewBase; in CreateLoadStoreMulti()
756 BuildMI(MBB, InsertBefore, DL, TII->get(BaseOpc), NewBase) in CreateLoadStoreMulti()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DGuardWidening.cpp250 void setBase(const Value *NewBase) { Base = NewBase; } in setBase() argument
H A DSeparateConstOffsetFromGEP.cpp1444 Value *NewBase = in swapGEPOperand() local
1447 if (!getObjectSize(NewBase, ObjectSize, DAL, TLI) || in swapGEPOperand()
H A DLoopStrengthReduce.cpp4020 Formula NewBase = Base; in GenerateCombinations() local
4021 NewBase.BaseRegs.clear(); in GenerateCombinations()
4031 NewBase.BaseRegs.push_back(BaseReg); in GenerateCombinations()
4041 Formula F = NewBase; in GenerateCombinations()
4062 if (NewBase.UnfoldedOffset.isNonZero() && NewBase.UnfoldedOffset.isFixed()) { in GenerateCombinations()
4065 NewBase.UnfoldedOffset.getFixedValue(), true)); in GenerateCombinations()
4066 NewBase.UnfoldedOffset = Immediate::getFixed(0); in GenerateCombinations()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp717 Register NewBase = Stores[0].Ptr->getReg(0); in tryOptimizeConsecStores() local
723 NewBase, NewOff); in tryOptimizeConsecStores()
H A DAArch64LegalizerInfo.cpp1860 Register NewBase; in matchLDPSTPAddrMode() local
1862 if (mi_match(Root, MRI, m_GPtrAdd(m_Reg(NewBase), m_ICst(NewOffset))) && in matchLDPSTPAddrMode()
1864 Base = NewBase; in matchLDPSTPAddrMode()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp1276 Register NewBase; in changeDependences() local
1278 if (!canUseLastOffsetValue(I.getInstr(), BasePos, OffsetPos, NewBase, in changeDependences()
1291 MachineInstr *LastMI = MRI.getUniqueVRegDef(NewBase); in changeDependences()
1322 SDep Dep(&I, SDep::Anti, NewBase); in changeDependences()
1328 InstrChanges[&I] = std::make_pair(NewBase, NewOffset); in changeDependences()
2909 Register &NewBase, in canUseLastOffsetValue() argument
2955 NewBase = PrevReg; in canUseLastOffsetValue()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachinePipeliner.h470 unsigned &OffsetPos, Register &NewBase,
/freebsd/contrib/llvm-project/clang/lib/Sema/
H A DSemaPseudoObject.cpp97 auto *NewBase = rebuild(refExpr->getBase()); in rebuildMSPropertySubscriptExpr() local
100 NewBase, in rebuildMSPropertySubscriptExpr()
H A DTreeTransform.h6978 QualType NewBase = NewBaseTSI->getType(); in TransformUnaryTransformType() local
6980 Result = getDerived().RebuildUnaryTransformType(NewBase, in TransformUnaryTransformType()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfDebug.cpp3295 const MCSymbol *NewBase = DD.getSectionLabel(&Begin->getSection()); in emitRangeList() local
3297 Base = NewBase; in emitRangeList()
3302 } else if (NewBase != Begin || P.second.size() > 1) { in emitRangeList()
3306 Base = NewBase; in emitRangeList()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp273 void updateBaseAndOffset(MachineInstr &I, Register NewBase,
2056 Register NewBase, in updateBaseAndOffset() argument
2059 Base->setReg(NewBase); in updateBaseAndOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1799 SDValue NewBase = OldBase; in findAddrModeSVELoadStore() local
1803 N, OldBase, NewBase, NewOffset); in findAddrModeSVELoadStore()
1808 !IsRegImm && SelectSVERegRegAddrMode(OldBase, Scale, NewBase, NewOffset); in findAddrModeSVELoadStore()
1811 return std::make_tuple(IsRegReg ? Opc_rr : Opc_ri, NewBase, NewOffset); in findAddrModeSVELoadStore()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp4877 auto NewBase = in matchReassocConstantInnerRHS() local
4880 MI.getOperand(1).setReg(NewBase.getReg(0)); in matchReassocConstantInnerRHS()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp56805 SDValue NewBase = DAG.getNode(ISD::ADD, DL, PtrVT, Base, in combineGatherScatter() local
56808 return rebuildGatherScatter(GorS, NewIndex, NewBase, Scale, DAG); in combineGatherScatter()
56812 SDValue NewBase = DAG.getNode(ISD::ADD, DL, PtrVT, Base, Splat); in combineGatherScatter() local
56814 return rebuildGatherScatter(GorS, NewIndex, NewBase, Scale, DAG); in combineGatherScatter()
56828 SDValue NewBase = DAG.getConstant(0, DL, PtrVT); in combineGatherScatter() local
56829 return rebuildGatherScatter(GorS, NewIndex, NewBase, Scale, DAG); in combineGatherScatter()