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Searched refs:MemSDNode (Results 1 – 25 of 44) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.h78 bool tryLDG(MemSDNode *N);
115 insertMemoryInstructionFence(SDLoc DL, SDValue &Chain, MemSDNode *N);
116 NVPTX::Scope getOperationScope(MemSDNode *N, NVPTX::Ordering O) const;
H A DNVPTXISelDAGToDAG.cpp518 static unsigned int getCodeAddrSpace(const MemSDNode *N) { in getCodeAddrSpace()
533 getOperationOrderings(MemSDNode *N, const NVPTXSubtarget *Subtarget) { in getOperationOrderings()
724 NVPTX::Scope NVPTXDAGToDAGISel::getOperationScope(MemSDNode *N, in getOperationScope()
758 static bool canLowerToLDG(const MemSDNode &N, const NVPTXSubtarget &Subtarget, in canLowerToLDG()
870 MemSDNode *N) { in insertMemoryInstructionFence()
1014 MemSDNode *LD = cast<MemSDNode>(N); in tryLoad()
1093 MemSDNode *LD = cast<MemSDNode>(N); in tryLoadVector()
1172 bool NVPTXDAGToDAGISel::tryLDG(MemSDNode *LD) { in tryLDG()
1241 auto *LD = cast<MemSDNode>(N); in tryLDU()
1301 MemSDNode *ST = cast<MemSDNode>(N); in tryStore()
[all …]
H A DNVPTXISelLowering.cpp3175 MemSDNode *N = cast<MemSDNode>(Op.getNode()); in LowerSTOREVector()
5016 auto *LD = cast<MemSDNode>(N); in combineUnpackingMovIntoLoad()
5105 auto *ST = cast<MemSDNode>(N); in combinePackingMovIntoStore()
5284 MemSDNode *Mem = dyn_cast<MemSDNode>(Val); in PerformANDCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVR.h75 inline bool isProgramMemoryAccess(MemSDNode const *N) { in isProgramMemoryAccess()
86 inline int getProgramMemoryBank(MemSDNode const *N) { in getProgramMemoryBank()
H A DAVRISelDAGToDAG.cpp123 MVT VT = cast<MemSDNode>(Op)->getMemoryVT().getSimpleVT(); in SelectAddr()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td602 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8;
605 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16;
608 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32;
611 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64;
621 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8;
624 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16;
627 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i32;
630 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i64;
641 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i8;
644 return cast<MemSDNode>(N)->getMemoryVT() == MVT::i16;
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECustomDAG.cpp219 if (MemSDNode *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getNodeChain()
231 if (auto *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getMemoryPtr()
247 if (auto MemN = dyn_cast<MemSDNode>(Op)) in getIdiomaticVectorType()
305 if (isa<MemSDNode>(Op.getNode())) { in getLoadStoreStride()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h527 friend class MemSDNode;
545 friend class MemSDNode;
1397 class MemSDNode : public SDNode {
1407 LLVM_ABI MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
1582 class AtomicSDNode : public MemSDNode {
1586 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1656 class MemIntrinsicSDNode : public MemSDNode {
1660 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
2512 class LSBaseSDNode : public MemSDNode {
2517 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
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H A DTargetLowering.h455 getTargetMMOFlags(const MemSDNode &Node) const { in getTargetMMOFlags()
776 areTwoSDNodeTargetMMOFlagsMergeable(const MemSDNode &NodeX, in areTwoSDNodeTargetMMOFlagsMergeable()
777 const MemSDNode &NodeY) const { in areTwoSDNodeTargetMMOFlagsMergeable()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelDAGToDAG.cpp26 bool isConstantLoad(const MemSDNode *N, int cbID) const;
70 bool R600DAGToDAGISel::isConstantLoad(const MemSDNode *N, int CbId) const { in isConstantLoad()
H A DSIISelLowering.h119 SDValue adjustLoadValueType(unsigned Opcode, MemSDNode *M,
123 SDValue lowerIntrinsicLoad(MemSDNode *M, bool IsFormat, SelectionDAG &DAG,
187 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const;
294 MemSDNode *M) const;
H A DR600Instructions.td290 [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_empty());}]>;
295 [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (!SDValue(N, 0).use_empty());}]>;
299 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
341 const MemSDNode *LD = cast<MemSDNode>(N);
354 const MemSDNode *LD = cast<MemSDNode>(N);
H A DSIISelLowering.cpp2005 const MemSDNode *MemNode = cast<MemSDNode>(N); in isMemOpHasNoClobberedMemOperand()
4412 switch (cast<MemSDNode>(Op)->getAddressSpace()) { in lowerPREFETCH()
6282 SDValue SITargetLowering::adjustLoadValueType(unsigned Opcode, MemSDNode *M, in adjustLoadValueType()
6316 SDValue SITargetLowering::lowerIntrinsicLoad(MemSDNode *M, bool IsFormat, in lowerIntrinsicLoad()
8711 if (isa<MemSDNode>(Op)) in lowerImage()
8784 if (isa<MemSDNode>(Op)) in lowerImage()
8838 if (auto *MemOp = dyn_cast<MemSDNode>(Op)) { in lowerImage()
9389 auto *M = cast<MemSDNode>(Op); in lowerRawBufferAtomicIntrin()
9417 auto *M = cast<MemSDNode>(Op); in lowerStructBufferAtomicIntrin()
9432 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN()
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H A DAMDGPUISelDAGToDAG.cpp407 unsigned AS = cast<MemSDNode>(N)->getAddressSpace(); in glueCopyToM0LDSInit()
1740 static MemSDNode* findMemSDNode(SDNode *N) { in findMemSDNode()
1742 if (MemSDNode *MN = dyn_cast<MemSDNode>(N)) in findMemSDNode()
1746 if (MemSDNode *MN = in findMemSDNode()
1747 dyn_cast<MemSDNode>(AMDGPUTargetLowering::stripBitcast(V))) in findMemSDNode()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.cpp261 cast<MemSDNode>(Node)->getAlign() >= in Select()
262 cast<MemSDNode>(Node)->getMemoryVT().getStoreSize()) && in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp303 CurDAG->setNodeMemRefs(Load, {cast<MemSDNode>(Node)->getMemOperand()}); in selectVLSEG()
333 CurDAG->setNodeMemRefs(Load, {cast<MemSDNode>(Node)->getMemOperand()}); in selectVLSEGFF()
382 CurDAG->setNodeMemRefs(Load, {cast<MemSDNode>(Node)->getMemOperand()}); in selectVLXSEG()
409 CurDAG->setNodeMemRefs(Store, {cast<MemSDNode>(Node)->getMemOperand()}); in selectVSSEG()
455 CurDAG->setNodeMemRefs(Store, {cast<MemSDNode>(Node)->getMemOperand()}); in selectVSXSEG()
884 MachineMemOperand *MemOp = cast<MemSDNode>(Node)->getMemOperand(); in tryIndexedLoad()
1810 CurDAG->setNodeMemRefs(New, {cast<MemSDNode>(Node)->getMemOperand()}); in Select()
1843 CurDAG->setNodeMemRefs(New, {cast<MemSDNode>(Node)->getMemOperand()}); in Select()
2231 CurDAG->setNodeMemRefs(Load, {cast<MemSDNode>(Node)->getMemOperand()}); in Select()
2277 CurDAG->setNodeMemRefs(Load, {cast<MemSDNode>(Node)->getMemOperand()}); in Select()
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H A DRISCVISelLowering.h175 getTargetMMOFlags(const MemSDNode &Node) const override;
178 areTwoSDNodeTargetMMOFlagsMergeable(const MemSDNode &NodeX,
179 const MemSDNode &NodeY) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.h132 bool isAlignedMemNode(const MemSDNode *N) const;
H A DHexagonPatternsHVX.td106 return isAlignedMemNode(cast<MemSDNode>(N));
110 return !isAlignedMemNode(cast<MemSDNode>(N));
114 return isAlignedMemNode(cast<MemSDNode>(N));
118 return !isAlignedMemNode(cast<MemSDNode>(N));
H A DHexagonISelDAGToDAG.cpp1111 SDValue LDBasePtr = cast<MemSDNode>(SYNode)->getBasePtr(); in isMemOPCandidate()
1112 SDValue STBasePtr = cast<MemSDNode>(UUse)->getBasePtr(); in isMemOPCandidate()
1740 bool HexagonDAGToDAGISel::isAlignedMemNode(const MemSDNode *N) const { in isAlignedMemNode()
2417 SDValue BasePtr = cast<MemSDNode>(N)->getBasePtr(); in rebalanceAddressTrees()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h940 void IncrementPointer(MemSDNode *N, EVT MemVT, MachinePointerInfo &MPI,
974 void SplitVecRes_Gather(MemSDNode *VPGT, SDValue &Lo, SDValue &Hi,
1014 SDValue SplitVecOp_Scatter(MemSDNode *N, unsigned OpNo);
1015 SDValue SplitVecOp_Gather(MemSDNode *MGT, unsigned OpNo);
H A DSelectionDAGDumper.cpp912 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { in print_details()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp365 MachineMemOperand *MemRef = cast<MemSDNode>(N1)->getMemOperand(); in tryIndexedBinOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp220 bool selectVectorAddr(MemSDNode *Parent, SDValue BasePtr, SDValue IndexOp,
904 if (isa<MemSDNode>(Chain.getNode()) && in isCalleeLoad()
905 cast<MemSDNode>(Chain.getNode())->writeMem()) in isCalleeLoad()
1073 auto *MemNode = cast<MemSDNode>(N); in PreprocessISelDAG()
2960 bool X86DAGToDAGISel::selectVectorAddr(MemSDNode *Parent, SDValue BasePtr, in selectVectorAddr()
3017 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in selectAddr()
4689 CurDAG->setNodeMemRefs(MNode, {cast<MemSDNode>(C)->getMemOperand()}); in matchVPTERNLOG()
5072 CurDAG->setNodeMemRefs(CNode, {cast<MemSDNode>(Src1)->getMemOperand()}); in tryVPTESTM()
6736 CurDAG->setNodeMemRefs(Res, cast<MemSDNode>(Node)->getMemOperand()); in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp671 return isa<MemSDNode>(*N) || N->getOpcode() == AArch64ISD::PREFETCH; in isMemOpOrPrefetch()
1031 if (isStrongerThanMonotonic(cast<MemSDNode>(User)->getSuccessOrdering())) in isWorthFoldingADDlow()
1707 MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand(); in tryIndexedLoad()
4196 EVT MemTy = cast<MemSDNode>(N)->getMemoryVT(); in SelectCMP_SWAP()
4219 MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand(); in SelectCMP_SWAP()
7406 if (isa<MemSDNode>(Root)) { in getMemVTFromNode()
7407 EVT MemVT = cast<MemSDNode>(Root)->getMemoryVT(); in getMemVTFromNode()

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