| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 41 MachineRegisterInfo &MRI,
44 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
46 bool legalizeFroundeven(MachineInstr &MI, MachineRegisterInfo &MRI,
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
52 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
59 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
61 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
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| H A D | AMDGPURegisterBankInfo.h | 53 MachineRegisterInfo &MRI,
60 Register buildReadFirstLane(MachineIRBuilder &B, MachineRegisterInfo &MRI,
90 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
100 const ValueMapping *getValueMappingForPtr(const MachineRegisterInfo &MRI,
106 unsigned getRegBankID(Register Reg, const MachineRegisterInfo &MRI,
111 const MachineRegisterInfo &MRI,
116 const MachineRegisterInfo &MRI,
121 const MachineRegisterInfo &MRI,
139 addMappingFromTable(const MachineInstr &MI, const MachineRegisterInfo &MRI,
145 const MachineInstr &MI, const MachineRegisterInfo
[all...] |
| H A D | GCNRegPressure.h | 26 class MachineRegisterInfo; variable
71 const MachineRegisterInfo &MRI);
117 static unsigned getRegKind(Register Reg, const MachineRegisterInfo &MRI);
155 mutable const MachineRegisterInfo *MRI = nullptr;
177 const MachineRegisterInfo &MRI);
184 void reset(const MachineRegisterInfo &MRI_, const LiveRegSet &LiveRegs_);
187 void reset(const MachineRegisterInfo &MRI, SlotIndex SI) { in reset()
265 const MachineRegisterInfo &MRI);
268 const MachineRegisterInfo &MRI);
271 const MachineRegisterInfo &MRI);
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| H A D | SIRegisterInfo.h | 207 bool isSGPRReg(const MachineRegisterInfo &MRI, Register Reg) const;
284 MCRegister findUnusedRegister(const MachineRegisterInfo &MRI,
289 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
292 getRegClassForOperandReg(const MachineRegisterInfo &MRI, in isVectorRegister()
295 bool isVGPR(const MachineRegisterInfo &MRI, Register Reg) const;
296 bool isAGPR(const MachineRegisterInfo &MRI, Register Reg) const;
297 bool isVectorRegister(const MachineRegisterInfo &MRI, Register Reg) const {
309 bool isUniformReg(const MachineRegisterInfo &MRI, const RegisterBankInfo &RBI,
343 const MachineRegisterInfo &MRI) const override;
368 MachineRegisterInfo
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| H A D | SILowerI1Copies.h | 34 Register createLaneMaskReg(MachineRegisterInfo *MRI,
35 MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs);
48 MachineRegisterInfo *MRI = nullptr;
51 MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 41 class MachineRegisterInfo; variable
94 Register constrainRegToClass(MachineRegisterInfo &MRI,
109 MachineRegisterInfo &MRI,
128 MachineRegisterInfo &MRI,
150 bool canReplaceReg(Register DstReg, Register SrcReg, MachineRegisterInfo &MRI);
154 bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI);
175 const MachineRegisterInfo &MRI);
179 const MachineRegisterInfo &MRI);
192 const MachineRegisterInfo &MRI,
198 Register VReg, const MachineRegisterInfo &MRI,
[all …]
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| H A D | MIPatternMatch.h | 25 [[nodiscard]] bool mi_match(Reg R, const MachineRegisterInfo &MRI, in mi_match()
31 [[nodiscard]] bool mi_match(MachineInstr &MI, const MachineRegisterInfo &MRI, in mi_match()
41 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
55 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
67 const MachineRegisterInfo &);
71 const MachineRegisterInfo &MRI) { in matchConstant()
77 const MachineRegisterInfo &MRI) { in matchConstant()
84 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
102 const MachineRegisterInfo &);
106 const MachineRegisterInfo &MRI) { in matchConstantSplat()
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| H A D | LoadStoreOpt.h | 35 class MachineRegisterInfo;
58 BaseIndexOffset getPointerInfo(Register Ptr, MachineRegisterInfo &MRI);
64 bool &IsAlias, MachineRegisterInfo &MRI);
71 MachineRegisterInfo &MRI, AliasAnalysis *AA);
85 MachineRegisterInfo *MRI = nullptr;
34 class MachineRegisterInfo; global() variable
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 41 void MachineRegisterInfo::Delegate::anchor() {} in anchor()
43 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) in MachineRegisterInfo() function in MachineRegisterInfo
59 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) { in setRegClass()
64 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
70 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
85 const TargetRegisterClass *MachineRegisterInfo::constrainRegClass( in constrainRegClass()
93 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
123 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
147 Register MachineRegisterInfo::createIncompleteVirtualRegister(StringRef Name) { in createIncompleteVirtualRegister()
159 MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass, in createVirtualRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.h | 37 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
42 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
46 bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
49 bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeICMP(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeFunnelShift(MachineInstr &MI, MachineRegisterInfo &MRI,
59 bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
61 bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
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| H A D | AArch64PostLegalizerLowering.cpp | 157 bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
193 bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
214 bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
230 bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
248 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt()
288 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
303 bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup()
349 bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT()
405 bool matchNonConstInsert(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchNonConstInsert()
413 void applyNonConstInsert(MachineInstr &MI, MachineRegisterInfo &MRI, in applyNonConstInsert()
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| H A D | AArch64GlobalISelUtils.h | 35 getAArch64VectorSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI);
41 const MachineRegisterInfo &MRI);
46 const MachineRegisterInfo &MRI);
60 extractPtrauthBlendDiscriminators(Register Disc, MachineRegisterInfo &MRI);
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| H A D | AArch64PostLegalizerCombiner.cpp | 67 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
110 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
125 bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
131 bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
137 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
250 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
259 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext()
267 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext()
280 bool matchMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchMutateAnyExtToZExt()
297 void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI, in applyMutateAnyExtToZExt()
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| H A D | AArch64RegisterBankInfo.h | 126 const MachineRegisterInfo &MRI,
131 bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI,
135 bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
139 bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 46 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
58 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
110 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
163 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands()
202 MachineRegisterInfo &MRI) { in canReplaceReg()
223 const MachineRegisterInfo &MRI) { in isTriviallyDead()
296 const MachineRegisterInfo &MRI) { in getIConstantVRegVal()
307 llvm::getIConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI) { in getIConstantVRegSExtVal()
329 getConstantVRegValWithLookThrough(Register VReg, const MachineRegisterInfo &MRI, in getConstantVRegValWithLookThrough()
427 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs) { in getIConstantVRegValWithLookThrough()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 28 class MachineRegisterInfo; variable
137 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
140 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
143 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
146 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
149 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
152 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
155 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
158 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
161 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 52 MachineRegisterInfo &MRI) { in IsRegInClass()
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSReg()
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVRReg()
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) { in IsF8Reg()
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSFReg()
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSSReg()
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in processBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 65 void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
68 void processDstReg(MachineRegisterInfo *MRI, Register &DstReg,
71 void processInst(MachineRegisterInfo *MRI, MachineInstr *Inst,
73 void checkADDrr(MachineRegisterInfo *MRI, MachineOperand *RelocOp,
75 void checkShift(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
128 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
176 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
190 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
225 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
286 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 78 bool selectLoadStoreOp(MachineInstr &I, MachineRegisterInfo &MRI,
80 bool selectFrameIndexOrGep(MachineInstr &I, MachineRegisterInfo &MRI,
82 bool selectGlobalValue(MachineInstr &I, MachineRegisterInfo &MRI,
84 bool selectConstant(MachineInstr &I, MachineRegisterInfo &MRI,
86 bool selectTruncOrPtrToInt(MachineInstr &I, MachineRegisterInfo &MRI,
88 bool selectZext(MachineInstr &I, MachineRegisterInfo &MRI,
90 bool selectAnyext(MachineInstr &I, MachineRegisterInfo &MRI,
92 bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
94 bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
96 bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI,
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| H A D | X86RegisterBankInfo.h | 55 const MachineRegisterInfo &MRI, const bool isFP,
69 bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI,
74 bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
78 bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 66 MachineRegisterInfo *MRI;
105 const MachineRegisterInfo *MRI) { in isGPR64()
114 const MachineRegisterInfo *MRI) { in isFPR64()
128 const MachineRegisterInfo *MRI, in getSrcFromCopy()
209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
241 for (MachineRegisterInfo::use_instr_nodbg_iterator in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVISelLowering.cpp | 107 inline Register getTypeReg(MachineRegisterInfo *MRI, Register OpReg) { in getTypeReg()
114 static void doInsertBitcast(const SPIRVSubtarget &STI, MachineRegisterInfo *MRI, in doInsertBitcast()
151 MachineRegisterInfo *MRI, SPIRVGlobalRegistry &GR, in validatePtrTypes()
185 MachineRegisterInfo *MRI, in validateGroupWaitEventsPtr()
207 MachineRegisterInfo *MRI, in validateGroupAsyncCopyPtr()
248 MachineRegisterInfo *DefMRI, in validateFunCallMachineDef()
249 MachineRegisterInfo *CallMRI, in validateFunCallMachineDef()
284 MachineRegisterInfo *CallMRI, in validateFunCall()
293 MachineRegisterInfo *DefMRI = &FunDef->getParent()->getParent()->getRegInfo(); in validateFunCall()
301 MachineRegisterInfo *DefMRI, SPIRVGlobalRegistry &GR, in validateForwardCalls()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 33 class MachineRegisterInfo; variable
291 MachineRegisterInfo &MRI;
325 MachineRegisterInfo &MRI);
336 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI()
556 const MachineRegisterInfo &MRI) const;
599 const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
667 MachineRegisterInfo &MRI);
752 TypeSize getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 52 bool isRegInGprb(Register Reg, MachineRegisterInfo &MRI) const;
53 bool isRegInFprb(Register Reg, MachineRegisterInfo &MRI) const;
62 MachineRegisterInfo &MRI);
65 MachineRegisterInfo &MRI);
68 bool selectCopy(MachineInstr &MI, MachineRegisterInfo &MRI) const;
70 MachineRegisterInfo &MRI) const;
73 MachineRegisterInfo &MRI, bool IsLocal = true,
77 MachineRegisterInfo &MRI) const;
79 MachineRegisterInfo &MRI) const;
83 MachineRegisterInfo &MRI) const;
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