Home
last modified time | relevance | path

Searched refs:Load2 (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h524 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
542 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
H A DX86InstrInfo.cpp8746 bool X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
8749 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
8844 !IsLoadOpcode(Load2->getMachineOpcode())) in areLoadsFromSameBasePtr()
8849 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
8863 auto Disp2 = dyn_cast<ConstantSDNode>(Load2->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
8872 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
8880 unsigned Opc2 = Load2->getMachineOpcode(); in shouldScheduleLoadsNear()
H A DX86ISelLowering.cpp52959 SDValue Load2 = in combineLoad() local
52964 Load1.getValue(1), Load2.getValue(1)); in combineLoad()
52966 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h249 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
260 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
H A DARMBaseInstrInfo.cpp1791 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1797 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1824 !IsLoadOpcode(Load2->getMachineOpcode())) in areLoadsFromSameBasePtr()
1828 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1829 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
1833 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
1838 isa<ConstantSDNode>(Load2->getOperand(1))) { in areLoadsFromSameBasePtr()
1840 Offset2 = cast<ConstantSDNode>(Load2->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
1858 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
1874 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1510 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1524 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp13712 LoadSDNode *Load2 = cast<LoadSDNode>(Op2); in tryToFoldExtendSelectLoad() local
13714 !TLI.isLoadExtLegal(ExtLoadOpcode, VT, Load2->getMemoryVT()) || in tryToFoldExtendSelectLoad()