| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | InstructionCost.h | 254 InstructionCost LHS2(LHS);
255 LHS2 += RHS;
256 return LHS2;
261 InstructionCost LHS2(LHS);
262 LHS2 -= RHS;
263 return LHS2;
268 InstructionCost LHS2(LHS);
269 LHS2 *= RHS;
270 return LHS2;
275 InstructionCost LHS2(LHS);
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LICM.cpp | 2440 Value *LHS1, *LHS2, *RHS1, *RHS2; in hoistMinMax() local
2442 !MatchICmpAgainstInvariant(Cond2, P2, LHS2, RHS2)) in hoistMinMax()
2444 if (P1 != P2 || LHS1 != LHS2) in hoistMinMax()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 3797 Value *LHS2, *RHS2; in visitSelectInst() local
3798 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor) in visitSelectInst()
3799 if (Instruction *R = foldSPFofSPF(cast<Instruction>(LHS), SPF2, LHS2, in visitSelectInst()
3802 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor) in visitSelectInst()
3803 if (Instruction *R = foldSPFofSPF(cast<Instruction>(RHS), SPF2, LHS2, in visitSelectInst()
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| H A D | InstCombineCompares.cpp | 3181 Value *LHS2, *RHS2; in matchThreeWayIntCompare() local
3182 if (!match(UnequalVal, m_Select(m_ICmp(PredB, m_Value(LHS2), m_Value(RHS2)), in matchThreeWayIntCompare()
3187 if (LHS2 != LHS) { in matchThreeWayIntCompare()
3189 std::swap(LHS2, RHS2); in matchThreeWayIntCompare()
3192 if (LHS2 != LHS) in matchThreeWayIntCompare()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 815 SDValue LHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_1, in getAVRCmp() local
842 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp); in getAVRCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 3683 const Value *LHS2 = nullptr, *RHS2 = nullptr; in isSignedMinMaxClamp() local
3684 SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor; in isSignedMinMaxClamp()
3694 In = LHS2; in isSignedMinMaxClamp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5695 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
5697 expandf64Toi32(LHS, DAG, LHS1, LHS2); in OptimizeVFPBrcond()
5699 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
5704 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond()
12234 Register LHS2 = MI.getOperand(2).getReg(); in EmitInstrWithCustomInserter() local
12241 .addReg(LHS2).addImm(0) in EmitInstrWithCustomInserter()
12251 .addReg(LHS2).addReg(RHS2) in EmitInstrWithCustomInserter()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7537 SDValue LHS2 = Val.getOperand(0); in matchSetCC() local
7541 if (LHS == LHS2 && RHS == RHS2) { in matchSetCC()
7544 if (CC == ISD::getSetCCInverse(CC2, LHS2.getValueType())) in matchSetCC()
7546 } else if (LHS == RHS2 && RHS == LHS2) { in matchSetCC()
7550 if (CC == ISD::getSetCCInverse(CC2, LHS2.getValueType())) in matchSetCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23118 SDValue LHS1, LHS2; in splitIntVSETCC() local
23119 std::tie(LHS1, LHS2) = splitVector(LHS, DAG, dl); in splitIntVSETCC()
23130 DAG.getNode(ISD::SETCC, dl, HiVT, LHS2, RHS2, CC)); in splitIntVSETCC()
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