| /freebsd/crypto/openssl/crypto/ec/curve448/ |
| H A D | f_generic.c | 169 gf L0, L1, L2; in gf_isr() local
172 ossl_gf_mul(L2, x, L1); in gf_isr()
173 ossl_gf_sqr(L1, L2); in gf_isr()
174 ossl_gf_mul(L2, x, L1); in gf_isr()
175 gf_sqrn(L1, L2, 3); in gf_isr()
176 ossl_gf_mul(L0, L2, L1); in gf_isr()
178 ossl_gf_mul(L0, L2, L1); in gf_isr()
179 gf_sqrn(L2, L0, 9); in gf_isr()
180 ossl_gf_mul(L1, L0, L2); in gf_isr()
182 ossl_gf_mul(L2, x, L0); in gf_isr()
[all …]
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| /freebsd/lib/libc/i386/string/ |
| H A D | strcpy.S | 55 je L2
59 je L2
63 je L2
67 je L2
71 je L2
75 je L2
79 je L2
86 L2: popl %eax /* pop dst address */ label
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| H A D | strcat.S | 65 je L2
69 je L2
73 je L2
77 je L2
81 je L2
85 je L2
89 je L2
96 L2: popl %eax /* pop destination address */ label
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| H A D | strchr.S | 54 je L2
59 L2: label
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| H A D | strrchr.S | 55 jne L2
57 L2: label
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | ilist.h | 182 template <class Cloner> void cloneFrom(const iplist_impl &L2, Cloner clone) {
184 for (const_reference V : L2)
223 void transfer(iterator position, iplist_impl &L2, iterator first, iterator last) {
228 this->transferNodesFromList(L2, first, last);
230 base_list_type::splice(position, L2, first, last);
266 void splice(iterator where, iplist_impl &L2) {
267 if (!L2.empty())
268 transfer(where, L2, L2.begin(), L2.end());
270 void splice(iterator where, iplist_impl &L2, iterator first) {
273 transfer(where, L2, first, last);
[all …]
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| H A D | simple_ilist.h | 179 void cloneFrom(const simple_ilist &L2, Cloner clone, Disposer dispose) {
181 for (const_reference V : L2) in remove()
244 void splice(iterator I, simple_ilist &L2) {
245 splice(I, L2, L2.begin(), L2.end());
249 void splice(iterator I, simple_ilist &L2, iterator Node) { in splice()
250 splice(I, L2, Node, std::next(Node));
171 cloneFrom(const simple_ilist & L2,Cloner clone,Disposer dispose) cloneFrom() argument
236 splice(iterator I,simple_ilist & L2) splice() argument
241 splice(iterator I,simple_ilist & L2,iterator Node) splice() argument
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| H A D | EquivalenceClasses.h | 242 member_iterator unionSets(member_iterator L1, member_iterator L2) { in unionSets() argument
243 assert(L1 != member_end() && L2 != member_end() && "Illegal inputs!"); in unionSets()
244 if (L1 == L2) return L1; // Unifying the same two sets, noop. in unionSets()
248 const ECValue &L1LV = *L1.Node, &L2LV = *L2.Node; in unionSets()
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | l2cache.txt | 1 Freescale L2 Cache Controller
3 L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
42 - reg : Address and size of L2 cache controller registers
43 - cache-size : Size of the entire L2 cache
44 - interrupts : Error interrupt of L2 controller
45 - cache-line-size : Size of L2 cache lines
49 L2: l2-cache-controller@20000 {
53 cache-size = <0x40000>; // L2,256K
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| H A D | cache_sram.txt | 11 - fsl,cache-sram-ctlr-handle : points to the L2 controller
17 fsl,cache-sram-ctlr-handle = <&L2>;
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| /freebsd/sys/contrib/device-tree/Bindings/cache/ |
| H A D | freescale-l2cache.txt | 1 Freescale L2 Cache Controller
3 L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
42 - reg : Address and size of L2 cache controller registers
43 - cache-size : Size of the entire L2 cache
44 - interrupts : Error interrupt of L2 controller
45 - cache-line-size : Size of L2 cache lines
49 L2: l2-cache-controller@20000 {
53 cache-size = <0x40000>; // L2,256K
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| /freebsd/crypto/openssl/crypto/whrlpool/ |
| H A D | wp_block.c | 529 u64 L0, L1, L2, L3, L4, L5, L6, L7; in whirlpool_block()
560 … L2 = C0(K, 2) ^ C1(K, 1) ^ C2(K, 0) ^ C3(K, 7) ^ C4(K, 6) ^ C5(K, 5) ^ C6(K, 4) ^ C7(K, 3); in whirlpool_block()
569 K.q[2] = L2; in whirlpool_block()
578 … L2 ^= C0(S, 2) ^ C1(S, 1) ^ C2(S, 0) ^ C3(S, 7) ^ C4(S, 6) ^ C5(S, 5) ^ C6(S, 4) ^ C7(S, 3); in whirlpool_block()
587 S.q[2] = L2; in whirlpool_block()
596 L2 = C2(K, 0); in whirlpool_block()
605 L2 ^= C1(K, 1); in whirlpool_block()
613 L2 ^= C0(K, 2); in whirlpool_block()
629 L2 ^= C7(K, 3); in whirlpool_block()
637 L2 ^= C6(K, 4); in whirlpool_block()
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/calxeda/ |
| H A D | highbank.dts | 25 next-level-cache = <&L2>;
44 next-level-cache = <&L2>;
63 next-level-cache = <&L2>;
82 next-level-cache = <&L2>;
135 L2: cache-controller { label
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| /freebsd/libexec/rtld-elf/arm/ |
| H A D | rtld_start.S | 42 ldr sl, .L2
43 ldr r5, .L2+4
44 ldr r0, .L2+8
64 .L2: label
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| /freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-dt.txt | 33 next-level-cache = <&L2>;
47 next-level-cache = <&L2>;
53 next-level-cache = <&L2>;
59 next-level-cache = <&L2>;
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| /freebsd/sys/contrib/device-tree/src/arm/arm/ |
| H A D | vexpress-v2p-ca9.dts | 44 next-level-cache = <&L2>;
51 next-level-cache = <&L2>;
58 next-level-cache = <&L2>;
65 next-level-cache = <&L2>;
166 L2: cache-controller@1e00a000 { label
227 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
272 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
286 /* PL310, L2 cache, RAM cell supply (not PL310 logic) */
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| H A D | arm-realview-eb-a9mp.dts | 42 next-level-cache = <&L2>;
49 next-level-cache = <&L2>;
56 next-level-cache = <&L2>;
63 next-level-cache = <&L2>;
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| H A D | arm-realview-eb-11mp.dts | 46 next-level-cache = <&L2>;
53 next-level-cache = <&L2>;
60 next-level-cache = <&L2>;
67 next-level-cache = <&L2>;
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| /freebsd/sys/dev/iavf/ |
| H A D | iavf_common.c | 598 IAVF_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
599 IAVF_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, TS, PAY2),
600 IAVF_PTT(3, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
603 IAVF_PTT(6, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
604 IAVF_PTT(7, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
607 IAVF_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
608 IAVF_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
609 IAVF_PTT(12, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
610 IAVF_PTT(13, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
611 IAVF_PTT(14, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY3),
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/vf/ |
| H A D | vf610.dtsi | 8 next-level-cache = <&L2>;
12 L2: cache-controller@40006000 { label
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| /freebsd/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_rfgain.c | 126 uint32_t L1, L2, L3, L4; in ar5212InvalidGainReadback() local
131 L2 = 107; in ar5212InvalidGainReadback()
135 L2 = 83; in ar5212InvalidGainReadback()
143 L2 = (gStep == 0x3f) ? 50 : gStep + 4; in ar5212InvalidGainReadback()
153 return !((g >= L1 && g<= L2) || (g >= L3 && g <= L4)); in ar5212InvalidGainReadback()
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | mpc8572ds_camp_core1.dts | 5 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
58 cache-size = <0x80000>; // L2, 512K
80 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
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| /freebsd/lib/msun/ld80/ |
| H A D | k_expl.h | 52 L2 = -3.2819649005320973e-13, /* -0x1718432a1b0e26.0p-94 */ variable
226 r = x - fn * L1 - fn * L2; /* r = r1 + r2 done independently. */ in __k_expl()
232 r2 = fn * -L2; in __k_expl()
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| /freebsd/sys/contrib/device-tree/Bindings/riscv/ |
| H A D | sifive-l2-cache.txt | 1 SiFive L2 Cache Controller
26 - reg: Physical base address and size of L2 cache controller registers map
32 - memory-region: reference to the reserved-memory for the L2 Loosely Integrated
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/riscv/ |
| H A D | int_mul_impl.inc | 27 beqz a3, .L2
29 .L2:
|