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Searched refs:IsWave32 (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPreEmitPeephole.cpp89 const bool IsWave32 = ST.isWave32(); in optimizeVccBranch() local
91 const unsigned ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in optimizeVccBranch()
92 const unsigned And = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in optimizeVccBranch()
93 const unsigned AndN2 = IsWave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64; in optimizeVccBranch()
94 const unsigned Mov = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in optimizeVccBranch()
H A DSILowerI1Copies.h44 bool IsWave32 = false;
H A DSIFixSGPRCopies.cpp1096 bool IsWave32 = MF.getSubtarget<GCNSubtarget>().isWave32(); in fixSCCCopies() local
1111 TII->get(IsWave32 ? AMDGPU::S_CSELECT_B32 in fixSCCCopies()
1123 unsigned Opcode = IsWave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in fixSCCCopies()
1124 Register Exec = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in fixSCCCopies()
H A DSIRegisterInfo.cpp107 bool IsWave32; member
113 bool IsWave32, MachineBasicBlock::iterator MI, int Index, in SGPRSpillBuilder()
115 : SGPRSpillBuilder(TRI, TII, IsWave32, MI, MI->getOperand(0).getReg(), in SGPRSpillBuilder()
119 bool IsWave32, MachineBasicBlock::iterator MI, Register Reg, in SGPRSpillBuilder()
124 IsWave32(IsWave32) { in SGPRSpillBuilder()
129 if (IsWave32) { in SGPRSpillBuilder()
146 Data.PerVGPR = IsWave32 ? 32 : 64; in getPerVGPRData()
201 IsWave32 ? AMDGPU::SGPR_32RegClass : AMDGPU::SGPR_64RegClass; in prepare()
H A DSIWholeQuadMode.cpp1527 bool IsWave32 = ST->isWave32(); in lowerInitExec() local
1533 TII->get(IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64), in lowerInitExec()
1581 TII->get(IsWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), Exec) in lowerInitExec()
1589 TII->get(IsWave32 ? AMDGPU::S_CMOV_B32 : AMDGPU::S_CMOV_B64), in lowerInitExec()
H A DSILowerI1Copies.cpp519 IsWave32 = ST->isWave32(); in PhiLoweringHelper()
521 if (IsWave32) { in PhiLoweringHelper()
H A DAMDGPUInstructionSelector.cpp1407 const bool IsWave32 = (STI.getWavefrontSize() == 32); in selectBallot() local
1411 if (Size != STI.getWavefrontSize() && (!Is64 || !IsWave32)) in selectBallot()
1440 BuildCopy(IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC); in selectBallot()
H A DSIInstrInfo.cpp5510 bool IsWave32 = ST.isWave32(); in insertScratchExecCopy() local
5515 unsigned MovOpc = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in insertScratchExecCopy()
5516 MCRegister Exec = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in insertScratchExecCopy()
5526 IsWave32 ? AMDGPU::S_OR_SAVEEXEC_B32 : AMDGPU::S_OR_SAVEEXEC_B64; in insertScratchExecCopy()
H A DSIISelLowering.cpp4893 bool IsWave32 = ST.isWave32(); in lowerWaveReduce() local
4894 unsigned MovOpc = IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in lowerWaveReduce()
4895 unsigned ExecReg = IsWave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC; in lowerWaveReduce()
4919 unsigned SFFOpc = IsWave32 ? AMDGPU::S_FF1_I32_B32 : AMDGPU::S_FF1_I32_B64; in lowerWaveReduce()
4932 IsWave32 ? AMDGPU::S_BITSET0_B32 : AMDGPU::S_BITSET0_B64; in lowerWaveReduce()
4945 unsigned CMPOpc = IsWave32 ? AMDGPU::S_CMP_LG_U32 : AMDGPU::S_CMP_LG_U64; in lowerWaveReduce()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp1108 bool IsWave32 = EnableWavefrontSize32 ? in getVGPRAllocGranule() local
1113 return IsWave32 ? 24 : 12; in getVGPRAllocGranule()
1116 return IsWave32 ? 16 : 8; in getVGPRAllocGranule()
1118 return IsWave32 ? 8 : 4; in getVGPRAllocGranule()
1126 bool IsWave32 = EnableWavefrontSize32 ? in getVGPREncodingGranule() local
1130 return IsWave32 ? 8 : 4; in getVGPREncodingGranule()
1138 bool IsWave32 = STI->getFeatureBits().test(FeatureWavefrontSize32); in getTotalNumVGPRs() local
1140 return IsWave32 ? 1536 : 768; in getTotalNumVGPRs()
1141 return IsWave32 ? 1024 : 512; in getTotalNumVGPRs()