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Searched refs:IsNeg (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DScaledNumber.h442 static int64_t joinSigned(uint64_t U, bool IsNeg) { in joinSigned() argument
444 return IsNeg ? INT64_MIN : INT64_MAX; in joinSigned()
445 return IsNeg ? -int64_t(U) : int64_t(U); in joinSigned()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp1041 bool IsNeg = false; in EmitPrintAliasInstruction() local
1047 IsNeg = true; in EmitPrintAliasInstruction()
1055 IsNeg ? "Neg" : "", Namespace, Arg->getAsString()))); in EmitPrintAliasInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp2475 const bool IsNeg = Offset < 0; in LowerMOVaddrPAC() local
2480 MCInstBuilder(IsNeg ? AArch64::SUBXri : AArch64::ADDXri) in LowerMOVaddrPAC()
2488 EmitToStreamer(MCInstBuilder(IsNeg ? AArch64::MOVNXi : AArch64::MOVZXi) in LowerMOVaddrPAC()
2490 .addImm((IsNeg ? ~UOffset : UOffset) & 0xffff) in LowerMOVaddrPAC()
2492 auto NeedMovk = [IsNeg, UOffset](int BitPos) -> bool { in LowerMOVaddrPAC()
2495 if (!IsNeg) in LowerMOVaddrPAC()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp515 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitMul() local
516 return SelectInst::Create(IsNeg, NegC, ConstantInt::getNullValue(Ty)); in visitMul()
526 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitMul() local
527 return SelectInst::Create(IsNeg, Y, ConstantInt::getNullValue(Ty)); in visitMul()
H A DInstCombineAndOrXor.cpp2828 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitAnd() local
2829 return SelectInst::Create(IsNeg, Y, ConstantInt::getNullValue(Ty)); in visitAnd()
2837 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitAnd() local
2838 return SelectInst::Create(IsNeg, ConstantInt::getNullValue(Ty), Y); in visitAnd()
4586 Value *IsNeg = Builder.CreateIsNeg(A); in canonicalizeAbs() local
4592 return SelectInst::Create(IsNeg, NegA, A); in canonicalizeAbs()
H A DInstCombineAddSub.cpp2751 Value *IsNeg = Builder.CreateIsNeg(A); in visitSub() local
2756 return SelectInst::Create(IsNeg, NegA, A); in visitSub()
H A DInstCombineSelect.cpp2010 Value *IsNeg = Builder.CreateIsNeg(CmpLHS, ICI->getName()); in foldSelectInstWithICmp() local
2011 replaceOperand(SI, 0, IsNeg); in foldSelectInstWithICmp()
/freebsd/contrib/llvm-project/llvm/lib/MC/MCParser/
H A DAsmParser.cpp3201 bool IsNeg = false; in parseRealValue() local
3204 IsNeg = true; in parseRealValue()
3229 if (IsNeg) in parseRealValue()
H A DMasmParser.cpp3342 bool IsNeg = false; in parseRealValue() local
3347 IsNeg = true; in parseRealValue()
3390 if (IsNeg) in parseRealValue()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp3312 Value *IsNeg = Builder.CreateICmpSLT(ArgValue, Zero, "isneg"); in EmitBuiltinExpr() local
3314 Value *Tmp = Builder.CreateSelect(IsNeg, Inverse, ArgValue); in EmitBuiltinExpr()
4229 Value *IsNeg = EmitSignBit(*this, Arg); in EmitBuiltinExpr() local
4235 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); in EmitBuiltinExpr()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyLibCalls.cpp3171 Value *IsNeg = B.CreateIsNeg(X); in optimizeAbs() local
3173 return B.CreateSelect(IsNeg, NegX, X); in optimizeAbs()
/freebsd/contrib/llvm-project/llvm/lib/Frontend/OpenMP/
H A DOMPIRBuilder.cpp4153 Value *IsNeg = Builder.CreateICmpSLT(Step, Zero); in calculateCanonicalLoopTripCount() local
4154 Incr = Builder.CreateSelect(IsNeg, Builder.CreateNeg(Step), Step); in calculateCanonicalLoopTripCount()
4155 Value *LB = Builder.CreateSelect(IsNeg, Stop, Start); in calculateCanonicalLoopTripCount()
4156 Value *UB = Builder.CreateSelect(IsNeg, Start, Stop); in calculateCanonicalLoopTripCount()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp2914 SDValue IsNeg = DAG.getSetCC(dl, PredTy, Op0, Zero, ISD::SETLT); in ExpandHvxIntToFp() local
2916 SDValue Sign = DAG.getNode(ISD::VSELECT, dl, InpTy, {IsNeg, M80, Zero}); in ExpandHvxIntToFp()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp19046 auto IsProfitable = [this](bool IsNeg, bool IsAddOne, EVT VT) -> bool { in combineMUL() argument
19070 return IsAddOne && IsNeg ? VT.isVector() : true; in combineMUL()
19078 bool IsNeg = MulAmt.isNegative(); in combineMUL() local
19085 if (!IsProfitable(IsNeg, true, VT)) in combineMUL()
19094 if (!IsNeg) in combineMUL()
19102 if (!IsProfitable(IsNeg, false, VT)) in combineMUL()
19110 if (!IsNeg) in combineMUL()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp5176 bool IsNeg = StringRef(BLGPLoc.getPointer()).starts_with("neg:"); in validateBLGP() local
5189 if (IsNeg == UsesNeg) in validateBLGP()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp5779 auto IsNeg = Builder.buildICmp(CmpInst::Predicate::ICMP_SLT, CCVT, RHS, Zero); in applySDivByPow2() local
5780 Builder.buildSelect(MI.getOperand(0).getReg(), IsNeg, Neg, AShr); in applySDivByPow2()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp19967 SDValue IsNeg = DAG.getSetCC(DL, MVT::v4i64, Src, Zero, ISD::SETLT); in lowerINT_TO_FP_vXi64() local
19968 SDValue SignSrc = DAG.getSelect(DL, MVT::v4i64, IsNeg, Sign, Src); in lowerINT_TO_FP_vXi64()
19995 IsNeg = DAG.getNode(ISD::TRUNCATE, DL, MVT::v4i32, IsNeg); in lowerINT_TO_FP_vXi64()
19996 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64()
34462 SDValue IsNeg = DAG.getSetCC(dl, MVT::v2i64, Src, Zero, ISD::SETLT); in ReplaceNodeResults() local
34463 SDValue SignSrc = DAG.getSelect(dl, SrcVT, IsNeg, Sign, Src); in ReplaceNodeResults()
34486 IsNeg = DAG.getBitcast(MVT::v4i32, IsNeg); in ReplaceNodeResults()
34487 IsNeg = in ReplaceNodeResults()
34488 DAG.getVectorShuffle(MVT::v4i32, dl, IsNeg, IsNeg, {1, 3, -1, -1}); in ReplaceNodeResults()
34489 SDValue Cvt = DAG.getSelect(dl, MVT::v4f32, IsNeg, Slow, SignCvt); in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp19469 bool IsNeg = false; in isLegalT2AddressImmediate() local
19471 IsNeg = true; in isLegalT2AddressImmediate()
19502 if (IsNeg) in isLegalT2AddressImmediate()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp5170 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike() local
5171 SDValue Res = DAG.getSelect(DL, VT, IsNeg, Sub, Sra); in visitSDIVLike()