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Searched refs:IntrID (Results 1 – 25 of 32) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LowerAMXIntrinsics.cpp77 template <Intrinsic::ID IntrID>
78 std::enable_if_t<IntrID == Intrinsic::x86_tdpbssd_internal ||
79 IntrID == Intrinsic::x86_tdpbsud_internal ||
80 IntrID == Intrinsic::x86_tdpbusd_internal ||
81 IntrID == Intrinsic::x86_tdpbuud_internal ||
82 IntrID == Intrinsic::x86_tdpbf16ps_internal,
89 template <Intrinsic::ID IntrID>
90 std::enable_if_t<IntrID == Intrinsic::x86_tdpbssd_internal ||
91 IntrID == Intrinsic::x86_tdpbsud_internal ||
92 IntrID == Intrinsic::x86_tdpbusd_internal ||
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVTargetTransformInfo.cpp28 auto IntrID = II->getIntrinsicID(); in rewriteIntrinsicWithAddressSpace() local
29 switch (IntrID) { in rewriteIntrinsicWithAddressSpace()
H A DSPIRVUtils.cpp819 CallInst *buildIntrWithMD(Intrinsic::ID IntrID, ArrayRef<Type *> Types, in buildIntrWithMD() argument
826 return B.CreateIntrinsic(IntrID, {Types}, Args); in buildIntrWithMD()
H A DSPIRVUtils.h446 CallInst *buildIntrWithMD(Intrinsic::ID IntrID, ArrayRef<Type *> Types,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanPatternMatch.h565 IntrinsicID_match(Intrinsic::ID IntrID) : ID(IntrID) {} in IntrinsicID_match()
607 template <Intrinsic::ID IntrID> inline IntrinsicID_match m_Intrinsic() {
608 return IntrinsicID_match(IntrID);
611 template <Intrinsic::ID IntrID, typename T0>
613 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
616 template <Intrinsic::ID IntrID, typename T0, typename T1>
619 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
622 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2>
625 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
628 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2,
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DEarlyCSE.cpp810 IntrID = II->getIntrinsicID(); in ParseMemoryInst()
813 if (isHandledNonTargetIntrinsic(IntrID)) { in ParseMemoryInst()
814 switch (IntrID) { in ParseMemoryInst()
844 if (IntrID != 0) in isLoad()
850 if (IntrID != 0) in isStore()
856 if (IntrID != 0) in isAtomic()
862 if (IntrID != 0) in isUnordered()
875 if (IntrID != 0) in isVolatile()
900 if (IntrID != 0) in getMatchingId()
906 if (IntrID != 0) in getPointerOperand()
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H A DLoopIdiomRecognize.cpp2905 Intrinsic::ID IntrID = Intrinsic::ctlz; in recognizeShiftUntilBitTest() local
2916 IntrID, Ty, {PoisonValue::get(Ty), /*is_zero_poison=*/Builder.getTrue()}); in recognizeShiftUntilBitTest()
2958 IntrID, Ty, {XMasked, /*is_zero_poison=*/Builder.getTrue()}, in recognizeShiftUntilBitTest()
3252 Intrinsic::ID IntrID; in recognizeShiftUntilZero() local
3257 if (!detectShiftUntilZeroIdiom(CurLoop, SE, ValShiftedIsZero, IntrID, IV, in recognizeShiftUntilZero()
3288 IntrID, Ty, {PoisonValue::get(Ty), /*is_zero_poison=*/Builder.getFalse()}); in recognizeShiftUntilZero()
3304 IntrID, Ty, {Val, /*is_zero_poison=*/Builder.getFalse()}, in recognizeShiftUntilZero()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.h269 void SelectDSAppendConsume(SDNode *N, unsigned IntrID);
270 void SelectDSBvhStackIntrinsic(SDNode *N, unsigned IntrID);
271 void SelectDS_GWS(SDNode *N, unsigned IntrID);
H A DAMDGPUISelDAGToDAG.cpp2650 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) { in SelectDSAppendConsume() argument
2653 unsigned Opc = IntrID == Intrinsic::amdgcn_ds_append ? in SelectDSAppendConsume()
2692 void AMDGPUDAGToDAGISel::SelectDSBvhStackIntrinsic(SDNode *N, unsigned IntrID) { in SelectDSBvhStackIntrinsic() argument
2694 switch (IntrID) { in SelectDSBvhStackIntrinsic()
2715 static unsigned gwsIntrinToOpcode(unsigned IntrID) { in gwsIntrinToOpcode() argument
2716 switch (IntrID) { in gwsIntrinToOpcode()
2734 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) { in SelectDS_GWS() argument
2736 (IntrID == Intrinsic::amdgcn_ds_gws_sema_release_all && in SelectDS_GWS()
2789 const unsigned Opc = gwsIntrinToOpcode(IntrID); in SelectDS_GWS()
2859 unsigned IntrID = N->getConstantOperandVal(1); in SelectINTRINSIC_W_CHAIN() local
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H A DAMDGPULibCalls.cpp111 Intrinsic::ID IntrID);
114 Intrinsic::ID IntrID,
1284 Intrinsic::ID IntrID) { in replaceLibCallWithSimpleIntrinsic() argument
1300 CI->getModule(), IntrID, {CI->getType()})); in replaceLibCallWithSimpleIntrinsic()
1304 IRBuilder<> &B, CallInst *CI, Intrinsic::ID IntrID, bool AllowMinSizeF32, in tryReplaceLibcallWithSimpleIntrinsic() argument
1309 replaceLibCallWithSimpleIntrinsic(B, CI, IntrID); in tryReplaceLibcallWithSimpleIntrinsic()
H A DAMDGPUPromoteAlloca.cpp1160 Intrinsic::ID IntrID = Intrinsic::not_intrinsic; in getWorkitemID() local
1165 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_x in getWorkitemID()
1170 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_y in getWorkitemID()
1176 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_z in getWorkitemID()
1184 Function *WorkitemIdFn = Intrinsic::getOrInsertDeclaration(Mod, IntrID); in getWorkitemID()
H A DAMDGPUInstructionSelector.cpp1761 MachineInstr &MI, Intrinsic::ID IntrID) const { in selectDSOrderedIntrinsic()
1799 unsigned Instruction = IntrID == Intrinsic::amdgcn_ds_ordered_add ? 0 : 1; in selectDSOrderedIntrinsic()
1833 static unsigned gwsIntrinToOpcode(unsigned IntrID) { in gwsIntrinToOpcode() argument
1834 switch (IntrID) { in gwsIntrinToOpcode()
3725 MachineInstr &MI, Intrinsic::ID IntrID) const { in selectPermlaneSwapIntrin()
3726 if (IntrID == Intrinsic::amdgcn_permlane16_swap && in selectPermlaneSwapIntrin()
3729 if (IntrID == Intrinsic::amdgcn_permlane32_swap && in selectPermlaneSwapIntrin()
3733 unsigned Opcode = IntrID == Intrinsic::amdgcn_permlane16_swap in selectPermlaneSwapIntrin()
6447 MachineInstr &I, Intrinsic::ID IntrID) const { in selectSBarrierSignalIsfirst()
6466 MachineInstr &I, Intrinsic::ID IntrID) const { in selectSGetBarrierState()
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H A DAMDGPUTargetTransformInfo.cpp1106 auto IntrID = II->getIntrinsicID(); in rewriteIntrinsicWithAddressSpace() local
1107 switch (IntrID) { in rewriteIntrinsicWithAddressSpace()
1110 unsigned TrueAS = IntrID == Intrinsic::amdgcn_is_shared ? in rewriteIntrinsicWithAddressSpace()
H A DAMDGPUInstructionSelector.h151 bool selectPermlaneSwapIntrin(MachineInstr &I, Intrinsic::ID IntrID) const;
H A DAMDGPURegBankLegalizeRules.cpp358 unsigned IntrID = cast<GIntrinsic>(MI).getIntrinsicID(); in getRulesForOpc() local
359 auto IRAIt = IRulesAlias.find(IntrID); in getRulesForOpc()
H A DAMDGPURegisterBankInfo.cpp3253 auto IntrID = cast<GIntrinsic>(MI).getIntrinsicID(); in applyMappingImpl() local
3254 switch (IntrID) { in applyMappingImpl()
3367 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in applyMappingImpl()
5059 auto IntrID = AMDGPU::getIntrinsicID(MI); in getInstrMapping() local
5060 const AMDGPU::RsrcIntrinsic *RSrcIntrin = AMDGPU::lookupRsrcIntrinsic(IntrID); in getInstrMapping()
5106 auto IntrID = cast<GIntrinsic>(MI).getIntrinsicID(); in getInstrMapping() local
5107 switch (IntrID) { in getInstrMapping()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DPatternMatch.h2632 IntrinsicID_match(Intrinsic::ID IntrID) : ID(IntrID) {} in IntrinsicID_match()
2684 template <Intrinsic::ID IntrID> inline IntrinsicID_match m_Intrinsic() {
2685 return IntrinsicID_match(IntrID);
2704 template <Intrinsic::ID IntrID, typename T0>
2706 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
2709 template <Intrinsic::ID IntrID, typename T0, typename T1>
2712 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
2715 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2>
2718 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
2721 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2,
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp1499 template <Intrinsic::ID IntrID>
1502 static_assert(IntrID == Intrinsic::bswap || IntrID == Intrinsic::bitreverse, in foldBitOrderCrossLogicOp()
1517 if (match(X, m_Intrinsic<IntrID>(m_Value(OldReorderX))) && in foldBitOrderCrossLogicOp()
1518 match(Y, m_Intrinsic<IntrID>(m_Value(OldReorderY)))) { in foldBitOrderCrossLogicOp()
1522 if (match(X, m_OneUse(m_Intrinsic<IntrID>(m_Value(OldReorderX))))) { in foldBitOrderCrossLogicOp()
1523 Value *NewReorder = Builder.CreateUnaryIntrinsic(IntrID, Y); in foldBitOrderCrossLogicOp()
1527 if (match(Y, m_OneUse(m_Intrinsic<IntrID>(m_Value(OldReorderY))))) { in foldBitOrderCrossLogicOp()
1528 Value *NewReorder = Builder.CreateUnaryIntrinsic(IntrID, X); in foldBitOrderCrossLogicOp()
1566 template <Intrinsic::ID IntrID>
1571 static_assert(IntrID == Intrinsic::cttz || IntrID == Intrinsic::ctlz, in foldMinimumOverTrailingOrLeadingZeroCount()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroutines.cpp293 switch (auto IntrID = Id->getIntrinsicID()) { in analyze() local
324 ABI = IntrID == Intrinsic::coro_id_retcon ? coro::ABI::Retcon in analyze()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DExpandVectorPredication.cpp123 if (auto IntrID = VPI.getFunctionalIntrinsicID()) in maySpeculateLanes() local
124 return Intrinsic::getFnAttributes(VPI.getContext(), *IntrID) in maySpeculateLanes()
H A DMachineVerifier.cpp1060 unsigned IntrID = cast<GIntrinsic>(MI)->getIntrinsicID(); in verifyGIntrinsicSideEffects() local
1061 if (IntrID != 0 && IntrID < Intrinsic::num_intrinsics) { in verifyGIntrinsicSideEffects()
1063 MF->getFunction().getContext(), static_cast<Intrinsic::ID>(IntrID)); in verifyGIntrinsicSideEffects()
1084 unsigned IntrID = cast<GIntrinsic>(MI)->getIntrinsicID(); in verifyGIntrinsicConvergence() local
1085 if (IntrID != 0 && IntrID < Intrinsic::num_intrinsics) { in verifyGIntrinsicConvergence()
1087 MF->getFunction().getContext(), static_cast<Intrinsic::ID>(IntrID)); in verifyGIntrinsicConvergence()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DIRBuilder.cpp209 CallInst *IRBuilderBase::CreateMemTransferInst(Intrinsic::ID IntrID, Value *Dst, in CreateMemTransferInst() argument
214 assert((IntrID == Intrinsic::memcpy || IntrID == Intrinsic::memcpy_inline || in CreateMemTransferInst()
215 IntrID == Intrinsic::memmove) && in CreateMemTransferInst()
220 CallInst *CI = CreateIntrinsic(IntrID, Tys, Ops); in CreateMemTransferInst()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGHLSLRuntime.cpp564 Intrinsic::ID IntrID, in initializeBuffer() argument
585 /*ReturnType=*/HandleTy, IntrID, Args, nullptr, in initializeBuffer()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h1737 bool isIntrinsicSourceOfDivergence(unsigned IntrID);
1740 bool isIntrinsicAlwaysUniform(unsigned IntrID);
H A DAMDGPUBaseInfo.cpp3176 bool isIntrinsicSourceOfDivergence(unsigned IntrID) { in isIntrinsicSourceOfDivergence() argument
3177 return lookupSourceOfDivergence(IntrID); in isIntrinsicSourceOfDivergence()
3180 bool isIntrinsicAlwaysUniform(unsigned IntrID) { in isIntrinsicAlwaysUniform() argument
3181 return lookupAlwaysUniform(IntrID); in isIntrinsicAlwaysUniform()

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