Searched refs:FullDestReg (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 8306 Register FullDestReg = MRI.createVirtualRegister(NewDestRC); in splitScalar64BitUnaryOp() local 8307 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalar64BitUnaryOp() 8313 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitUnaryOp() 8322 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalar64BitUnaryOp() 8333 Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalarSMulU64() local 8413 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalarSMulU64() 8419 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalarSMulU64() 8431 addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist); in splitScalarSMulU64() 8442 Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass); in splitScalarSMulPseudo() local 8482 BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg) in splitScalarSMulPseudo() [all …]
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| H A D | SILoadStoreOptimizer.cpp | 2041 Register FullDestReg = MRI->createVirtualRegister(TRI->getVGPR64Class()); in computeBase() local 2043 BuildMI(*MBB, MBBI, DL, TII->get(TargetOpcode::REG_SEQUENCE), FullDestReg) in computeBase() 2051 return FullDestReg; in computeBase()
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