| /freebsd/contrib/one-true-awk/ |
| H A D | awk.h | 152 #define FCOS 10 macro
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| H A D | lex.c | 56 { "cos", FCOS, BLTIN },
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| H A D | run.c | 2100 case FCOS: in bltin()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 77 DAG_FUNCTION(cos, 1, 1, experimental_constrained_cos, FCOS)
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| H A D | RuntimeLibcalls.td | 2221 def zos___FCOS_B : RuntimeLibcallImpl<COS_F32, "@@FCOS@B">;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1007 FCOS, enumerator
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| H A D | BasicTTIImpl.h | 2250 ISD = ISD::FCOS; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 94 setOperationAction({ISD::FCOS, ISD::FSIN}, MVT::f32, Custom); in R600TargetLowering()
412 case ISD::FCOS: in LowerOperation()
702 case ISD::FCOS: in LowerTrig()
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| H A D | SIISelLowering.cpp | 219 ISD::FSIN, ISD::FCOS, ISD::FPOW, ISD::FPOWI, in SITargetLowering()
556 setOperationAction({ISD::FSIN, ISD::FCOS, ISD::FDIV}, MVT::f32, Custom); in SITargetLowering()
615 setOperationAction({ISD::FP_ROUND, ISD::STRICT_FP_ROUND, ISD::FCOS, in SITargetLowering()
6123 case ISD::FCOS: in LowerOperation()
11860 case ISD::FCOS: in LowerTrig()
13448 case ISD::FCOS: in isCanonicalized()
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| H A D | AMDGPUISelDAGToDAG.cpp | 147 case ISD::FCOS: in fp16SrcZerosHighBits()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 224 case ISD::FCOS: return "fcos"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 2422 ? ISD::FCOS : ISD::FSIN; in useSinCos()
3773 case ISD::FCOS: { in ExpandNode()
3782 if (Node->getOpcode() == ISD::FCOS) in ExpandNode()
3825 Tmp2 = DAG.getNode(ISD::FCOS, dl, VT, Op, Flags); in ExpandNode()
4710 case ISD::FCOS: in ConvertNodeToLibcall()
5801 case ISD::FCOS: in PromoteNode()
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| H A D | LegalizeFloatTypes.cpp | 96 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break; in SoftenFloatResult()
1577 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break; in ExpandFloatResult()
2837 case ISD::FCOS: in PromoteFloatResult()
3322 case ISD::FCOS: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 416 case ISD::FCOS: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 98 case ISD::FCOS: in ScalarizeVectorResult()
1219 case ISD::FCOS: in SplitVectorResult()
4904 case ISD::FCOS: in WidenVectorResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ScheduleAtom.td | 928 def : InstRW<[AtomWrite01_174], (instrs FSINCOS, FSIN, FCOS)>;
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| H A D | X86InstrFPStack.td | 659 def FCOS : I<0xD9, MRM_FF, (outs), (ins), "fcos", []>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1795 setOperationAction(ISD::FCOS , MVT::f128, Expand); in SparcTargetLowering()
1800 setOperationAction(ISD::FCOS , MVT::f64, Expand); in SparcTargetLowering()
1806 setOperationAction(ISD::FCOS , MVT::f32, Expand); in SparcTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 120 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 218 setOperationAction(ISD::FCOS, VT, Expand); in XtensaTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1677 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1724 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 458 setOperationAction(ISD::FCOS, MVT::f32, Expand); in MipsTargetLowering()
459 setOperationAction(ISD::FCOS, MVT::f64, Expand); in MipsTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 408 setOperationAction(ISD::FCOS , MVT::f64, Expand); in PPCTargetLowering()
413 setOperationAction(ISD::FCOS , MVT::f32, Expand); in PPCTargetLowering()
422 setOperationAction(ISD::FCOS , MVT::f64, Custom); in PPCTargetLowering()
428 setOperationAction(ISD::FCOS , MVT::f32, Custom); in PPCTargetLowering()
871 setOperationAction(ISD::FCOS, VT, Expand); in PPCTargetLowering()
1208 setOperationAction(ISD::FCOS, MVT::f128, Expand); in PPCTargetLowering()
12545 case ISD::FCOS: return lowerCos(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 388 setOperationAction(ISD::FCOS, VT, Expand); in addMVEVectorTypes()
871 setOperationAction(ISD::FCOS, MVT::v2f64, Expand); in ARMTargetLowering()
894 setOperationAction(ISD::FCOS, MVT::v4f32, Expand); in ARMTargetLowering()
913 setOperationAction(ISD::FCOS, MVT::v2f32, Expand); in ARMTargetLowering()
1063 setOperationAction(ISD::FCOS, MVT::f64, Expand); in ARMTargetLowering()
1417 setOperationAction(ISD::FCOS, MVT::f32, Expand); in ARMTargetLowering()
1418 setOperationAction(ISD::FCOS, MVT::f64, Expand); in ARMTargetLowering()
1502 setOperationAction(ISD::FCOS, MVT::f16, Promote); in ARMTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 250 setOperationAction(ISD::FCOS, VT, Expand); in initSPUActions()
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