Searched refs:ExtR (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 393 bool replaceInstrExact(const ExtDesc &ED, Register ExtR);
395 Register ExtR, int32_t &Diff);
396 bool replaceInstr(unsigned Idx, Register ExtR, const ExtenderInit &ExtI);
1587 bool HCE::replaceInstrExact(const ExtDesc &ED, Register ExtR) { in replaceInstrExact() argument
1605 .add(MachineOperand(ExtR)) in replaceInstrExact()
1610 .add(MachineOperand(ExtR)) in replaceInstrExact()
1624 .add(MachineOperand(ExtR)) in replaceInstrExact()
1638 MIB.add(MachineOperand(ExtR)); in replaceInstrExact()
1685 MIB.add(MachineOperand(ExtR)); // RegOff in replaceInstrExact()
1705 Register ExtR, int32_t &Diff) { in replaceInstrExpr() argument
[all …]
|
| H A D | HexagonVExtract.cpp | 168 Register ExtR = ExtI->getOperand(0).getReg(); in runOnMachineFunction() local
169 MRI.replaceRegWith(ExtR, ElemR); in runOnMachineFunction()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 26897 SDValue ExtR = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, R, Index); in visitVECTOR_SHUFFLE() local
26899 DAG.getNode(N0.getOpcode(), DL, EltVT, ExtL, ExtR, N0->getFlags()); in visitVECTOR_SHUFFLE()
|