Searched refs:ElementBits (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.h | 343 switch (unsigned ElementBits = ElementTy->getScalarSizeInBits()) { in isLegalBroadcastLoad() local
349 unsigned VectorBits = NumElements.getFixedValue() * ElementBits; in isLegalBroadcastLoad()
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| H A D | AArch64ISelLowering.cpp | 15686 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { in getVShiftImm() argument
15695 HasAnyUndefs, ElementBits) || in getVShiftImm()
15696 SplatBitSize > ElementBits) in getVShiftImm()
15708 int64_t ElementBits = VT.getScalarSizeInBits(); in isVShiftLImm() local
15709 if (!getVShiftImm(Op, ElementBits, Cnt)) in isVShiftLImm()
15711 return (Cnt >= 0 && (isLong ? Cnt - 1 : Cnt) < ElementBits); in isVShiftLImm()
15719 int64_t ElementBits = VT.getScalarSizeInBits(); in isVShiftRImm() local
15720 if (!getVShiftImm(Op, ElementBits, Cnt)) in isVShiftRImm()
15722 return (Cnt >= 1 && Cnt <= (isNarrow ? ElementBits / 2 : ElementBits)); in isVShiftRImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 537 int64_t ElementBits = Ty.getScalarSizeInBits(); in isVShiftRImm() local
538 return Cnt >= 1 && Cnt <= ElementBits; in isVShiftRImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6676 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { in getVShiftImm() argument
6686 ElementBits) || in getVShiftImm()
6687 SplatBitSize > ElementBits) in getVShiftImm()
6699 int64_t ElementBits = VT.getScalarSizeInBits(); in isVShiftLImm() local
6700 if (!getVShiftImm(Op, ElementBits, Cnt)) in isVShiftLImm()
6702 return (Cnt >= 0 && (isLong ? Cnt - 1 : Cnt) < ElementBits); in isVShiftLImm()
6714 int64_t ElementBits = VT.getScalarSizeInBits(); in isVShiftRImm() local
6715 if (!getVShiftImm(Op, ElementBits, Cnt)) in isVShiftRImm()
6718 return (Cnt >= 1 && Cnt <= (isNarrow ? ElementBits / 2 : ElementBits)); in isVShiftRImm()
6719 if (Cnt >= -(isNarrow ? ElementBits / 2 : ElementBits) && Cnt <= -1) { in isVShiftRImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 17187 int ElementBits = VT.getScalarSizeInBits(); in lower256BitShuffle() local
17188 if (ElementBits < 32) { in lower256BitShuffle()
17199 MVT FpVT = MVT::getVectorVT(MVT::getFloatingPointVT(ElementBits), in lower256BitShuffle()
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