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/freebsd/crypto/heimdal/doc/doxyout/gssapi/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
29 DIV.navpath {
38 DIV.navtab {
128 DIV.ah {
136 DIV.groupHeader {
142 DIV.groupText {
/freebsd/crypto/heimdal/doc/doxyout/hcrypto/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
29 DIV.navpath {
38 DIV.navtab {
128 DIV.ah {
136 DIV.groupHeader {
142 DIV.groupText {
/freebsd/crypto/heimdal/doc/doxyout/hdb/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
29 DIV.navpath {
38 DIV.navtab {
128 DIV.ah {
136 DIV.groupHeader {
142 DIV.groupText {
/freebsd/crypto/heimdal/doc/doxyout/hx509/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
29 DIV.navpath {
38 DIV.navtab {
128 DIV.ah {
136 DIV.groupHeader {
142 DIV.groupText {
/freebsd/crypto/heimdal/doc/doxyout/krb5/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
29 DIV.navpath {
38 DIV.navtab {
128 DIV.ah {
136 DIV.groupHeader {
142 DIV.groupText {
/freebsd/crypto/heimdal/doc/doxyout/ntlm/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
29 DIV.navpath {
38 DIV.navtab {
128 DIV.ah {
136 DIV.groupHeader {
142 DIV.groupText {
/freebsd/crypto/heimdal/doc/doxyout/wind/html/
H A Dtabs.css3 DIV.tabs
11 DIV.tabs UL
18 DIV.tabs LI, DIV.tabs FORM
25 DIV.tabs FORM
30 DIV.tabs A
40 DIV.tabs A:hover
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
60 DIV.tabs INPUT
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/freebsd/contrib/byacc/test/btyacc/
H A Dquote_calc2-s.output14 10 | expr "DIV" expr
86 "DIV" reduce 15
118 expr : expr . "DIV" expr (10)
126 "DIV" shift 19
141 "DIV" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV"
171 expr : expr . "DIV" expr (10)
180 "DIV" shift 19
206 expr : expr . "DIV" expr (10)
214 "DIV" shift 19
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H A Dquote_calc2.output14 10 | expr "DIV" expr
86 "DIV" reduce 15
118 expr : expr . "DIV" expr (10)
126 "DIV" shift 19
141 "DIV" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV"
171 expr : expr . "DIV" expr (10)
180 "DIV" shift 19
206 expr : expr . "DIV" expr (10)
214 "DIV" shift 19
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H A Dquote_calc4-s.output14 10 | expr "DIV-operator" expr
86 "DIV-operator" reduce 15
118 expr : expr . "DIV-operator" expr (10)
126 "DIV-operator" shift 19
141 "DIV-operator" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV-operator"
171 expr : expr . "DIV-operator" expr (10)
180 "DIV-operator" shift 19
206 expr : expr . "DIV-operator" expr (10)
214 "DIV-operator" shift 19
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H A Dquote_calc4.output14 10 | expr "DIV-operator" expr
86 "DIV-operator" reduce 15
118 expr : expr . "DIV-operator" expr (10)
126 "DIV-operator" shift 19
141 "DIV-operator" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV-operator"
171 expr : expr . "DIV-operator" expr (10)
180 "DIV-operator" shift 19
206 expr : expr . "DIV-operator" expr (10)
214 "DIV-operator" shift 19
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/freebsd/contrib/byacc/test/yacc/
H A Dquote_calc2-s.output14 10 | expr "DIV" expr
86 "DIV" reduce 15
118 expr : expr . "DIV" expr (10)
126 "DIV" shift 19
141 "DIV" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV"
171 expr : expr . "DIV" expr (10)
180 "DIV" shift 19
206 expr : expr . "DIV" expr (10)
214 "DIV" shift 19
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H A Dquote_calc2.output14 10 | expr "DIV" expr
86 "DIV" reduce 15
118 expr : expr . "DIV" expr (10)
126 "DIV" shift 19
141 "DIV" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV"
171 expr : expr . "DIV" expr (10)
180 "DIV" shift 19
206 expr : expr . "DIV" expr (10)
214 "DIV" shift 19
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H A Dquote_calc4-s.output14 10 | expr "DIV-operator" expr
86 "DIV-operator" reduce 15
118 expr : expr . "DIV-operator" expr (10)
126 "DIV-operator" shift 19
141 "DIV-operator" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV-operator"
171 expr : expr . "DIV-operator" expr (10)
180 "DIV-operator" shift 19
206 expr : expr . "DIV-operator" expr (10)
214 "DIV-operator" shift 19
[all …]
H A Dquote_calc4.output14 10 | expr "DIV-operator" expr
86 "DIV-operator" reduce 15
118 expr : expr . "DIV-operator" expr (10)
126 "DIV-operator" shift 19
141 "DIV-operator" reduce 16
164 12: shift/reduce conflict (shift 19, reduce 14) on "DIV-operator"
171 expr : expr . "DIV-operator" expr (10)
180 "DIV-operator" shift 19
206 expr : expr . "DIV-operator" expr (10)
214 "DIV-operator" shift 19
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/freebsd/sys/arm64/freescale/imx/
H A Dimx8mq_ccm.c146 DIV(IMX8MQ_ARM_PLL_REF_DIV, "arm_pll_ref_div", "arm_pll_ref_sel", 0x28, 5, 6),
147 DIV(IMX8MQ_GPU_PLL_REF_DIV, "gpu_pll_ref_div", "gpu_pll_ref_sel", 0x18, 5, 6),
148 DIV(IMX8MQ_VPU_PLL_REF_DIV, "vpu_pll_ref_div", "vpu_pll_ref_sel", 0x20, 5, 6),
149 DIV(IMX8MQ_AUDIO_PLL1_REF_DIV, "audio_pll1_ref_div", "audio_pll1_ref_sel", 0x0, 5, 6),
150 DIV(IMX8MQ_AUDIO_PLL2_REF_DIV, "audio_pll2_ref_div", "audio_pll2_ref_sel", 0x8, 5, 6),
151 DIV(IMX8MQ_VIDEO_PLL1_REF_DIV, "video_pll1_ref_div", "video_pll1_ref_sel", 0x10, 5, 6),
216 DIV(IMX8MQ_CLK_IPG_ROOT, "ipg_root", "ahb", 0x9080, 0, 1),
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedSyntacoreSCR3.td54 multiclass SCR3_IntDiv<ProcResourceKind DIV, int DivLatency> {
56 def : WriteRes<WriteIDiv, [DIV]>;
57 def : WriteRes<WriteIDiv32, [DIV]>;
58 def : WriteRes<WriteIRem, [DIV]>;
59 def : WriteRes<WriteIRem32, [DIV]>;
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td99 // Two DIV (Fixed Point Divide) units.
100 def DIV : ProcResource<2>;
218 // DIV Unit
219 // A DIV unit may take from 5 to 40 cycles to complete.
220 // Some DIV operations may keep the unit busy for up to 8 cycles.
221 def P9_DIV_5C : SchedWriteRes<[DIV]> {
225 def P9_DIV_12C : SchedWriteRes<[DIV]> {
229 def P9_DIV_16C_8 : SchedWriteRes<[DIV]> {
234 def P9_DIV_24C_8 : SchedWriteRes<[DIV]> {
239 def P9_DIV_40C_8 : SchedWriteRes<[DIV]> {
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H A DP9InstrResources.td24 // - Two DIV (Fixed Point Divide) units. One on each superslize. P9_DIV_*
920 // 5 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
929 // 12 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
943 // 16 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
955 // 24 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
973 // 40 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
984 // Cracked DIV and ALU operation. Requires one full slice for the ALU operation
985 // and one full superslice for the DIV operation since there is only one DIV per
986 // superslice. Latency of DIV plus ALU is 26.
993 // Cracked DIV and ALU operation. Requires one full slice for the ALU operation
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