| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSelectionDAGInfo.cpp | 172 static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg, in addIPMSequence() argument
174 SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in addIPMSequence()
186 SDValue CCReg; in EmitTargetCodeForMemcmp() local
191 CCReg = emitMemMemImm(DAG, DL, SystemZISD::CLC, Chain, Src2, Src1, Bytes); in EmitTargetCodeForMemcmp()
193 CCReg = emitMemMemReg(DAG, DL, SystemZISD::CLC, Chain, Src2, Src1, Size); in EmitTargetCodeForMemcmp()
194 Chain = CCReg.getValue(1); in EmitTargetCodeForMemcmp()
195 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForMemcmp()
211 SDValue CCReg = End.getValue(1); in EmitTargetCodeForMemchr() local
219 DAG.getTargetConstant(SystemZ::CCMASK_SRST_FOUND, DL, MVT::i32), CCReg}; in EmitTargetCodeForMemchr()
242 SDValue CCReg = Unused.getValue(1); in EmitTargetCodeForStrcmp() local
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| H A D | SystemZISelLowering.cpp | 3581 static SDValue emitSETCC(SelectionDAG &DAG, const SDLoc &DL, SDValue CCReg, in emitSETCC() argument
3586 DAG.getTargetConstant(CCMask, DL, MVT::i32), CCReg}; in emitSETCC()
3818 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSETCC() local
3819 return emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSETCC()
3838 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSTRICT_FSETCC() local
3839 CCReg->setFlags(Op->getFlags()); in lowerSTRICT_FSETCC()
3840 SDValue Result = emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSTRICT_FSETCC()
3841 SDValue Ops[2] = { Result, CCReg.getValue(1) }; in lowerSTRICT_FSETCC()
3853 SDValue CCReg = emitCmp(DAG, DL, C); in lowerBR_CC() local
3857 DAG.getTargetConstant(C.CCMask, DL, MVT::i32), Dest, CCReg); in lowerBR_CC()
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| H A D | SystemZISelDAGToDAG.cpp | 2029 SDValue CCReg = Node->getOperand(4); in expandSelectBoolean() local
2031 SDValue Result = CurDAG->getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in expandSelectBoolean()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 188 Register CCReg = CC->getReg(); in optimizeVcndVcmpPair() local
192 if (isDefBetween(*TRI, LIS, CCReg, *Sel, *And)) in optimizeVcndVcmpPair()
213 .addReg(CCReg, getUndefRegState(CC->isUndef()), CC->getSubReg()); in optimizeVcndVcmpPair()
228 if (CCReg.isVirtual()) { in optimizeVcndVcmpPair()
229 LiveInterval &CCLI = LIS->getInterval(CCReg); in optimizeVcndVcmpPair()
232 LIS->removeInterval(CCReg); in optimizeVcndVcmpPair()
233 LIS->createAndComputeVirtRegInterval(CCReg); in optimizeVcndVcmpPair()
236 LIS->removeAllRegUnitsForPhysReg(CCReg); in optimizeVcndVcmpPair()
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| H A D | AMDGPUInstructionSelector.cpp | 1452 Register CCReg = I.getOperand(0).getReg(); in selectG_ICMP_or_FCMP() local
1453 if (!isVCC(CCReg, *MRI)) { in selectG_ICMP_or_FCMP()
1460 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), CCReg) in selectG_ICMP_or_FCMP()
1464 RBI.constrainGenericRegister(CCReg, AMDGPU::SReg_32RegClass, *MRI); in selectG_ICMP_or_FCMP()
2385 Register CCReg = CCOp.getReg(); in selectG_SELECT() local
2386 if (!isVCC(CCReg, *MRI)) { in selectG_SELECT()
2390 .addReg(CCReg); in selectG_SELECT()
2395 if (!MRI->getRegClassOrNull(CCReg)) in selectG_SELECT()
2396 MRI->setRegClass(CCReg, TRI.getConstrainedRegClassForOperand(CCOp, *MRI)); in selectG_SELECT()
6450 Register CCReg = I.getOperand(0).getReg(); in selectSBarrierSignalIsfirst() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCInstPrinter.cpp | 495 MCRegister CCReg = MI->getOperand(OpNo).getReg(); in printcrbitm() local
497 switch (CCReg.id()) { in printcrbitm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 548 static inline MachineOperand condCodeOp(unsigned CCReg = 0) {
549 return MachineOperand::CreateReg(CCReg, false);
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| H A D | ARMConstantIslandPass.cpp | 1743 Register CCReg = MI->getOperand(2).getReg(); in fixupConditionalBr() local
1800 .addMBB(NextBB).addImm(CC).addReg(CCReg); in fixupConditionalBr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4597 SDValue CCReg = SelectCC(LHS, RHS, CC, dl, Chain); in trySETCC() local
4599 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 1), CCReg.getValue(1)); in trySETCC()
4612 CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg, in trySETCC()
4616 CCReg), 0); in trySETCC()
5887 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select() local
5903 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
5951 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), in Select()
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