| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | IfConversion.cpp | 155 SmallVector<MachineOperand, 4> BrCond; member
640 if (!TII->reverseBranchCondition(BBI.BrCond)) { in reverseBranchCondition()
642 TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in reverseBranchCondition()
703 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
910 if (TrueBBI.BrCond.size() == 0 || in ValidForkedDiamond()
911 FalseBBI.BrCond.size() == 0) in ValidForkedDiamond()
1043 BBI.BrCond.clear(); in AnalyzeBranches()
1045 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in AnalyzeBranches()
1049 BBI.BrCond.clear(); in AnalyzeBranches()
1052 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches()
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| H A D | MachinePipeliner.cpp | 518 LI.BrCond.clear(); in canPipelineLoop()
519 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond)) { in canPipelineLoop()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 236 MachineInstr *&BrCond) const;
238 MachineInstr *&BrCond) const;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1641 MachineInstr &MI, MachineInstr *&BrCond) const { in matchOptBrCondByInvertingCond()
1663 BrCond = &*std::prev(BrIt); in matchOptBrCondByInvertingCond()
1664 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1669 MachineBasicBlock *BrCondTarget = BrCond->getOperand(1).getMBB(); in matchOptBrCondByInvertingCond()
1675 MachineInstr &MI, MachineInstr *&BrCond) const { in applyOptBrCondByInvertingCond()
1677 Builder.setInstrAndDebugLoc(*BrCond); in applyOptBrCondByInvertingCond()
1678 LLT Ty = MRI.getType(BrCond->getOperand(0).getReg()); in applyOptBrCondByInvertingCond()
1684 auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True); in applyOptBrCondByInvertingCond()
1686 auto *FallthroughBB = BrCond->getOperand(1).getMBB(); in applyOptBrCondByInvertingCond()
1693 Observer.changingInstr(*BrCond); in applyOptBrCondByInvertingCond()
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| H A D | IRTranslator.cpp | 903 auto BrCond = MIB.buildBrCond(Cmp.getReg(0), *JT.Default); in emitJumpTableHeader() local
907 BrCond = MIB.buildBr(*JT.MBB); in emitJumpTableHeader()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachinePipeliner.h | 89 SmallVector<MachineOperand, 4> BrCond; member
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2543 Value *BrCond = I.getCondition(); in shouldKeepJumpConditionsTogether() local
2544 auto ShouldCountInsn = [&RhsDeps, &BrCond](const Instruction *Ins) { in shouldKeepJumpConditionsTogether()
2548 if (UIns != BrCond && !RhsDeps.contains(UIns)) in shouldKeepJumpConditionsTogether()
2935 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, MVT::Other, getControlRoot(), in visitSwitchCase() local
2938 setValue(CurInst, BrCond); in visitSwitchCase()
2943 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
2946 DAG.setRoot(BrCond); in visitSwitchCase()
3000 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader() local
3006 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitJumpTableHeader()
3009 DAG.setRoot(BrCond); in visitJumpTableHeader()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 7358 if (MachineInstr *BrCond = in legalizeIntrinsic() local
7366 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
7371 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
7396 BrCond->eraseFromParent(); in legalizeIntrinsic()
7406 if (MachineInstr *BrCond = in legalizeIntrinsic() local
7411 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
7417 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
7428 BrCond->eraseFromParent(); in legalizeIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 3169 Value *BrCond = BI->getCondition(); in speculativelyExecuteBB() local
3170 if (isa<FCmpInst>(BrCond)) in speculativelyExecuteBB()
3299 BrCond, TrueV, FalseV, "spec.store.select", BI); in speculativelyExecuteBB()
3390 Value *V = Builder.CreateSelect(BrCond, TrueV, FalseV, "spec.select", BI); in speculativelyExecuteBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 51514 SDNode *BrCond = *Flag->user_begin(); in combineX86SubCmpForFlags() local
51515 if (BrCond->getOpcode() != X86ISD::BRCOND) in combineX86SubCmpForFlags()
51518 if (static_cast<X86::CondCode>(BrCond->getConstantOperandVal(CondNo)) != in combineX86SubCmpForFlags()
51536 SmallVector<SDValue> Ops(BrCond->op_values()); in combineX86SubCmpForFlags()
51540 Ops[CondNo] = DAG.getTargetConstant(OppositeCC, SDLoc(BrCond), MVT::i8); in combineX86SubCmpForFlags()
51545 DAG.getNode(X86ISD::BRCOND, SDLoc(BrCond), BrCond->getValueType(0), Ops); in combineX86SubCmpForFlags()
51547 if (BrCond != NewBrCond.getNode()) in combineX86SubCmpForFlags()
51548 DCI.CombineTo(BrCond, NewBrCond); in combineX86SubCmpForFlags()
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